Datasheet

LT3761
14
3761f
applicaTions inFormaTion
ISP/ISN Short-Circuit Protection Feature
The ISP/ISN pins have a protection feature independent
of their LED current sense feature. The purpose of this
feature is to prevent the development of excessive cur-
rents that could damage the power components or the
load. The action threshold (V
ISP-ISN
> 600mV, typical) is
above the default LED current sense threshold, so that
no interference will occur with current regulation. This
feature acts in the same manner as switch current limit:
it prevents switch turn-on until the ISP/ISN difference
falls below the threshold. Exceeding the threshold also
activates a pull-down on the SS and PWM pins and causes
the GATE and PWMOUT pins to be driven low for at least
4µs. If an overcurrent condition is sensed at ISP/ISN and
the PWM pin is configured either to make an internal
dimming signal, or for always-on operation as shown in
the application titled Boost LED Driver with Output Short
Protection, then the LT3761 will enter a hiccup mode of
operation. In this mode, after the initial response to the
fault, the PWMOUT pin re-enables the output switch at an
interval set by the capacitor on the PWM pin. If the fault
is still present, the PWMOUT pin will go low after a short
delay (typically 7µs) and turn off the output switch. This
fault-retry sequence continues until the fault is no longer
present in the output.
PWM Dimming Control
There are two methods to control the current source for
dimming using the LT3761. One method uses the CTRL
pin to adjust the current regulated in the LEDs. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely pro-
grammed average current. To make PWM dimming more
accurate, the switch demand current is stored on the V
C
node during the quiescent phase when PWM is low. This
feature minimizes recovery time when the PWM signal
goes high. To further improve the recovery time, a dis-
connect switch may be used in the LED current path to
prevent the ISP node from discharging during the PWM
signal low phase.
The minimum PWM on or off time is affected by choice of
operating frequency and external component selection. The
data sheet application titled “Boost LED Driver for 30kHz
PWM Dimming” demonstrates regulated current pulses
as short as 3μs are achievable. The best overall combina-
tion of PWM and analog dimming capability is available if
the minimum PWM pulse is at least six switching cycles.
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1.3V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
PWMOUT enabled until either the voltage at SS reaches
the 1V level, or the output current reaches one-tenth of
the full-scale current. At this point the device will begin
following the dimming control as designated by PWM.
Disconnect Switch Selection
An NMOS in series with the LED string at the cathode is
recommended in most LT3761 applications to improve
the PWM dimming. The NMOS BV
DSS
rating should be as
high as the open LED regulation voltage set by the FB pin,
which is typically the same rating as the power switch of the
converter. The maximum continuous drain current I
D(MAX)
rating should be higher than the maximum LED current.
A PMOS high side disconnect is needed for buck mode,
buck-boost mode or an output short circuit protected
boost. A level shift to drive the PMOS switch is shown
in the application schematic Boost LED Driver with Out-
put Short Circuit Protection. In the case of a high side
disconnect follow the same guidelines as for the NMOS
regarding voltage and current ratings. It is important to
include a bypass diode to GND at the drain of the PMOS
switch to ensure that the voltage rating of this switch is
not exceeded during transient fault events.