Datasheet

LT3757/LT3757A
8
3757afd
block DiagraM
Figure 1. LT3757 Block Diagram Working as a SEPIC Converter
L1
R1
R3R4
M1
R2
L2
FBX
1.22V
2.5V
D1
C
DC
C
IN
V
OUT
C
OUT2
C
OUT1
C
VCC
INTV
CC
V
IN
R
SENSE
V
ISENSE
•
+
+
V
IN
I
S1
2µA
10
8
7
1
9
SHDN/UVLO
INTERNAL
REGULATOR
AND UVLO
TSD
165˚C
A10
Q3
V
C
VC
17.5V
2.7V UP
2.6V DOWN
A8
UVLO
I
S2
10µA
I
S3
C
C1
C
C2
R
C
DRIVER
SLOPE
SENSE
GND
GATE
108mV
SR1
+
–
+
–
CURRENT
LIMIT
RAMP
GENERATOR
7.2V LDO
•
+
–
+
–
R O
S
2.5V
G1
RT
R
T
SS
C
SS
SYNC
1.25V
1.25V
FBX
FBX
1.6V
–0.8V
+
–
+
–
+
–
2
3 5 4
+
–
+
–
6
11
RAMP
PWM
COMPARATOR
FREQUENCY
FOLDBACK
100kHz-1MHz
OSCILLATOR
FREQ
FOLDBACK
FREQ
PROG
3757 F01
–
+
+
Q1
A1
A2
1.72V
–0.88V
+
–
+
–
A11
A12
A3
A4
A5
A6
G2
G5
G6
A7
A9
Q2
D2
R5
8k
D3
G4 G3