Datasheet
LT3757/LT3757A
11
3757afd
applicaTions inForMaTion
Prior to lowering the operating frequency, however, be
sure to check with power MOSFET manufacturers for their
most recent low Q
G
, low R
DS(ON)
devices. Power MOSFET
manufacturing technologies are continually improving, with
newer and better performance devices being introduced
almost yearly.
An effective approach to reduce the power consumption
of the internal LDO for gate drive is to tie the INTV
CC
pin
to an external voltage source high enough to turn off the
internal LDO regulator.
If the input voltage V
IN
does not exceed the absolute
maximum rating of both the power MOSFET gate-source
voltage (V
GS
) and the INTV
CC
overvoltage lockout threshold
voltage (17.5V), the INTV
CC
pin can be shorted directly
to the V
IN
pin. In this condition, the internal LDO will be
turned off and the gate driver will be powered directly
from the input voltage, V
IN
. With the INTV
CC
pin shorted to
V
IN
, however, a small current (around 16µA) will load the
INTV
CC
in shutdown mode. For applications that require
the lowest shutdown mode input supply current, do not
connect the INTV
CC
pin to V
IN
.
In SEPIC or flyback applications, the INTV
CC
pin can be
connected to the output voltage V
OUT
through a blocking
diode, as shown in Figure 3, if V
OUT
meets the following
conditions:
1. V
OUT
< V
IN
(pin voltage)
2. V
OUT
< 17.5V
3. V
OUT
< maximum V
GS
rating of power MOSFET
A resistor R
VCC
can be connected, as shown in Figure 3, to
limit the inrush current from V
OUT
. Regardless of whether
or not the INTV
CC
pin is connected to an external voltage
source, it is always necessary to have the driver circuitry
bypassed with a 4.7µF low ESR ceramic capacitor to
ground immediately adjacent to the INTV
CC
and GND pins.
Figure 3. Connecting INTV
CC
to V
OUT
C
VCC
4.7µF
V
OUT
3757 F03
INTV
CC
GND
LT3757
R
VCC
D
VCC
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing gate drive cur-
rent and MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for
loop compensation. The LT3757 uses a constant-frequency
architecture that can be programmed over a 100kHz to
1000kHz range with a single external resistor from the
RT pin to ground, as shown in Figure 1. The RT pin must
have an external resistor to GND for proper operation of
the LT3757. A table for selecting the value of R
T
for a given
operating frequency is shown in Table 1.
Table 1. Timing Resistor (R
T
) Value
OSCILLATOR FREQUENCY (kHz) R
T
(kΩ)
100 140
200 63.4
300 41.2
400 30.9
500 24.3
600 19.6
700 16.5
800 14
900 12.1
1000 10.5
The operating frequency of the LT3757 can be synchronized
to an external clock source. By providing a digital clock
signal into the SYNC pin, the LT3757 will operate at the
SYNC clock frequency. If this feature is used, an R
T
resistor
should be chosen to program a switching frequency 20%
slower than SYNC pulse frequency. The SYNC pulse should
have a minimum pulse width of 200ns. Tie the SYNC pin
to GND if this feature is not used.