Datasheet

LT3757/LT3757A
26
3757afd
applicaTions inForMaTion
Figure 11. 8V to 16V Input, 24V/2A Output Boost Converter Suggested Layout
V
IN
3757 F10
V
OUT
L1
VIAS TO GROUND
PLANE
D1
C
OUT1
C
OUT2
1
2
8
7
3
4
6
5
M1
C
IN
R4
R
C
R1
R2
R
SS
R
T
R3
C
VCC
C
C1
C
C2
LT3757
1
2
3
4
5
9
10
6
7
8
R
S
Board Layout
The high speed operation of the LT3757 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC, and is important for thermal management of the
IC. Therefore, it is crucial to achieve a good electrical and
thermal contact between the Exposed Pad and the ground
plane of the board. For the LT3757 to deliver its full output
power, it is imperative that a good thermal path be pro-
vided to dissipate the heat generated within the package.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the IC and into
a copper plane with as much area as possible.
To prevent radiation and high frequency resonance prob-
lems, proper layout of the components connected to the
IC is essential, especially the power paths with higher di/
dt. The following high di/dt loops of different topologies
should be kept as tight as possible to reduce inductive
ringing:
• In boost configuration, the high di/dt loop contains
the output capacitor, the sensing resistor, the power
MOSFET and the Schottky diode.
• In flyback configuration, the high di
/dt primary loop
contains
the input capacitor, the primary winding, the
power MOSFET and the sensing resistor. The high di/
dt secondary loop contains the output capacitor, the
secondary winding and the output diode.
• In SEPIC configuration, the high di/dt loop contains
the power MOSFET, sense resistor, output capacitor,
Schottky diode and the coupling capacitor.
• In inverting configuration, the high di/dt loop contains
power MOSFET, sense resistor, Schottky diode and the
coupling capacitor.