Datasheet

LT3751
18
3751fc
applicaTions inForMaTion
with V
TRANS
between 100V and 400V (refer to Typical
Applications section). Consult applications engineering
for applications with V
TRANS
operating above 400V.
RV
OUT
is required for capacitor charger applications but
may be removed for regulator applications. Note that the
V
OUT
comparator can be used as secondary protection
for regulator applications. If the V
OUT
comparator is used
for protection, design V
OUT,TRIP
15% to 20% higher than
the regulation voltage. Tie the RV
OUT
pin to ground when
RV
OUT
resistor is removed.
R
DCM
needs to be properly sized in relation to RV
TRANS
.
Improper selection of R
DCM
can lead to undesired switching
operation at low output voltages. Use Table 2 to size R
DCM
.
Parasitic capacitance on RV
TRANS
, RV
OUT
, and R
DCM
should
be minimized. Capacitances on these nodes slow down
the response times of the V
OUT
and DCM comparators.
Keep the distance between the resistor and pin short. It
is recommended to remove all ground and power planes
underneath these pins and their respective components
(refer to the recommended board layout at the end of
this section).
R
BG
Selection
R
BG
sets the trip current (0.98/R
BG
) and is directly related
to the selection of RV
OUT
. The best accuracy is achieved
with a trip current between 100µA and 2mA. Choosing
RV
OUT
from Table 2 meets this criterion. Use the following
Table 3. Recommended NMOS Transistors
MANUFACTURER PART NUMBER I
D
(A) V
DS(MAX)
(V) R
DS(ON)
(mΩ) Q
G(TOT)
(nC) PACKAGE
Fairchild Semiconductor
www.fairchildsemi.com
FDS2582
FQB19N20L
FQP34N20L
FQD12N20L
FQB4N80
4.1
21
31
12
3.9
150
200
200
200
800
66
140
75
280
3600
11
27
55
16
19
SO-8
D
2
PAK
TO-220
DPAK
D
2
PAK
On Semiconductor
www.onsemi.com
MTD6N15T4G
NTD12N10T4G
NTB30N20T4G
NTB52N10T4G
6
12
30
52
150
100
200
100
300
165
81
30
15
14
75
72
DPAK
DPAK
D
2
PAK
D
2
PAK
Vishay
www.vishay.com
Si7820DN
Si7818DN
SUP33N20-60P
2.6
3.4
33
200
150
200
240
135
60
12.1
20
53
1212-8
1212-8
TO-220
equation to size R
BG
(V
TRANS
≤ 80V):
R
BG
= 0.98 •N •
RV
OUT
V
OUT,TRIP
+ V
DIODE






Tie R
BG
pin to ground when not using the V
OUT
compara-
tor. Consult applications engineering for calculating R
BG
when operating V
TRANS
above 80V.
NMOS Switch Selection
Choose an external NMOS power switch with minimal gate
charge and on-resistance that satisfies current limit and
voltage break-down requirements. The gate is nominally
driven to V
CC
– 2V during each charge cycle. Ensure that
this does not exceed the maximum gate to source voltage
rating of the NMOS but enhances the channel enough to
minimize the on-resistance.
Similarly, the maximum drain-source voltage rating of the
NMOS must exceed V
TRANS
+ V
OUT
/N or the magnitude of
the leakage inductance spike, whichever is greater. The
maximum instantaneous drain current rating must exceed
selected current limit. Because the switching period de-
creases with output voltage, the average current though
the NMOS is greatest when the output is nearly charged
and is given by:
I
AVG,M
=
I
PK
• V
OUT(PK)
2(V
OUT(PK)
+ N • V
TRANS
)
See Table 3 for recommended external NMOS transistors.