Datasheet

LT3748
16
3748fb
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applications inForMation
ring beyond that expected reverse voltage. An RC snubber
or RCD clamp may be implemented to reduce the voltage
spike if it is desirable to use a lower reverse voltage diode.
Secondary Leakage Inductance
In addition to the previously described effects of leakage
inductance in general, leakage inductance on the sec
-
ondary in particular exhibits an additional phenomena. It
forms an inductive divider on the transformer secondary
that effectively reduces the size of the primary-referred
flyback pulse used for feedback. This will increase the
output voltage target by a similar percentage. Note that,
unlike leakage spike behavior, this phenomena is load
independent. To the extent that the secondary leakage
inductance is a constant percentage of mutual inductance
Although it typically does not decrease efficiency, leakage
inductance energy that would normally have been dis
-
sipated in
the switch or transformer is also dissipated in
the RC snubber resistor and can be calculated as:
P
SNUBBER
= f
SW
• L
LEAK
• I
LIM
2
/2
An RCD clamp, shown in Figure 7, also prevents the
leakage inductance spike from exceeding the breakdown
voltage of the MOSFET switch. In most applications, there
will be a very fast voltage spike caused by a slow clamp
diode
. Once the diode clamps, the leakage inductance
current
is absorbed by the clamp capacitor. This period
should not last longer than 200ns so as not to interfere
with the output regulation. The clamp diode turns off after
the leakage inductance energy is absorbed and the switch
voltage is then equal to:
V
DS
= V
IN
+ N
PS
• (V
OUT
+ V
F(DIODE)
)
Schottky diodes are typically the best choice for use in a
snubber, but some PN diodes can be used if they turn on
fast enough to limit the leakage inductance spike. Figures 8
and 9 show the waveform at the drain of the MOSFET
switch for the 48V output application shown in Figure 17
at maximum rated load and maximum input voltage with
an RC snubber and RCD clamp, respectively. Both solu
-
tions limit
the leakage spike to less than 190V, below the
200V V
DS(MAX)
rating of the Si7464DP MOSFET.
Figure 7. RCD Clamp
Figure 8. Waveform of MOSFET Drain During Normal Operation
of Figure 19 with RC Snubber (as Drawn)
3748 F07
L
LEAK
V
IN
V
OUT
+
V
OUT
–
GATE NMOS
D
R
C
+
Figure 9. Waveform of MOSFET Drain During Normal Operation
of Figure 19 Using RCD Clamp with Central Semiconductor
CMR1U-02M-LT C Instead of RC Snubber
TIME (ns)
0
0
DRAIN VOLTAGE (V)
40
80
120
50
100
150 200
3748 F08
250
160
200
20
60
100
140
180
300
V
IN
= 96V
V
OUT
= 48V
I
OUT
= 0.5A
R = 66Ω
C = 150pF
TIME (ns)
0
0
DRAIN VOLTAGE (V)
40
80
120
50
100
150 200
3748 F08
250
160
200
20
60
100
140
180
300
V
IN
= 96V
V
OUT
= 48V
I
OUT
= 0.5A
R = 4.99k
C = TDK 0.22µF 250V
D = CMR1U-02M-LTC
Leakage Inductance and Output Diode Stress
The output diode may also see increased reverse voltage
stresses from leakage inductance. While it nominally sees
a reverse voltage of the input voltage divided by the wind
-
ings ratio plus the output voltage when the MOSFET power
switch
turns on, the capacitance on the output diode and
the leakage inductance will cause an LC tank which may
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