Datasheet

LT3746
22
3746fa
For more information www.linear.com/3746
applicaTions inForMaTion
The bulk capacitance is calculated based on maximum
input ripple, ∆V
IN
:
C
IN
=
D
MAX
• I
OUT(MAX)
ΔV
IN
• f
SW
∆V
IN
is typically chosen at a level acceptable to the user.
100mV is a good starting point. For ceramic capacitors,
only X5R or X7R type should be used because they retain
their capacitance over wider voltage and temperature
ranges than other types such as Y5V or Z5U. Aluminum
electrolytic capacitors are a good choice for high voltage,
bulk capacitance due to their high capacitance per unit
area.
The capacitor RMS current is:
I
CIN(RMS)
= I
OUT
•
V
OUT
•( V
IN
– V
OUT
)
V
IN
2
If applicable, calculate at the worst case condition,
V
IN
=2 • V
OUT
. The capacitor RMS current rating speci-
fied by the manufacturer should exceed the calculated
I
CIN(RMS)
. Due to their low ESR, ceramic capacitors are
a good choice for high voltage, high RMS current han-
dling. Note that the ripple current ratings from aluminum
e
l
ectrolytic capacitor manufacturers are based on 2000
hours of life. This makes it advisable to further derate
the capacitor or to choose a capacitor rated at a higher
temperature than required.
For a larger high voltage capacitor value, the combination
of aluminum electrolytic capacitors and ceramic capacitors
is an economical approach. Multiple capacitors may also
be paralleled to meet size or height requirements in the
design. Locate the capacitor very close to the MOSFET
switch and the catch diode, and use short, wide PCB traces
to minimize parasitic inductance.
The general discussion above also applies to the capacitor
C
VCC
at the V
CC
pin and the capacitor C
CAP
between the V
IN
and CAP pins. Typically, a 10µF 10V-rated ceramic capaci-
tor for C
VCC
and a 0.47µF 16V-rated ceramic capacitor for
C
CAP
should be sufficient.
C
OUT
Capacitor Selection
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated by
the LT3746 to produce the DC output containing a con
-
trolled voltage ripple. It also stores energy to satisfy load
tr
ansients and to stabilize the dual-loop operation. Thus
the selection criteria for C
OUT
are based on the voltage
rating, the equivalent series resistance ESR, and the bulk
capacitance. As always, choose the C
OUT
with a voltage
rating greater than V
OUT(MAX)
.
The LT3746 utilizes the output as the dominant pole to sta-
bilize the dual loop operation, so the C
OUT
value determines
the unity gain frequency f
UGF
, which is set around 1/10 of
the switching frequency. To stabilize the FB loop during the
startup and precharging phases and the LED loop during
the tracking phase, a low-ESR capacitor (tens of mΩ)
should be used and its minimum C
OUT
is calculated as:
C
OUT
= MAX
0.25
R
S
• f
UGF
,
1.5
V
OUT(MAX)
• R
S
• f
UGF








The adaptive-tracking-plus-precharging technique moves
the V
OUT
with the grayscale PWM dimming frequency to
improve system efficiency, choosing a ceramic capacitor
as the C
OUT
inevitably generates acoustic noise due to the
piezo effect of the ceramic material. In an acoustic noise
sensitive application, low ESR tantalum or aluminum
capacitors are preferred. When choosing a capacitor,
look carefully through the data sheet to find out what the
actual capacitance is under operating conditions (applied
voltage and temperature). A physically larger capacitor, or
one with a higher voltage rating, may be required.
Undervoltage Lockout (UVLO) and Shutdown
LT3746 has three UVLO thresholds with hysteresis for
the EN/UVLO, V
CC
, and CAP pins. The part will remain in
UVLO mode not switching until all the EN/UVLO, V
CC
, and
(V
IN
- V
CAP
) voltages pass their respective typical thresh-
olds (1.31V, 2.89V, and 4.9V). As shown in Figure 6, the
EN/UVLO pin can be controlled in two different ways. The
E
N
/UVLO pin can accept a digital input signal to enable or
disable the chip. Tie to 0.35V or lower to shut down the
chip or tie to 1.34V or higher for normal operation. This