Datasheet

LT3746
11
3746fa
For more information www.linear.com/3746
pin FuncTions
EN/UVLO (Pin 1): Enable and Undervoltage Lockout
(UVLO) Pin. The pin can accept a digital input signal to
en
able or disable the chip. Tie to 0.35V or lower to shut
down the chip or tie to 1.34V or higher for normal operation.
This pin can also be connected to V
IN
through a resistor
divider to program a power input UVLO threshold. If both
the enable and UVLO functions are not used, tie this pin
to V
CC
pin.
LED00 to LED31 (Pins 2-17, 30-45): LED Driver Output
Pins. Connect the cathodes of LED strings to these pins.
GND (Pin 18, 20, 27, 29): Ground Pin.
SCKI (Pin 19): Serial Interface TTL/CMOS Logic Clock
Input Pin.
SDI (Pin 21): Serial Interface TTL/CMOS Logic Data
Input Pin.
LDI (Pin 22): Serial Interface TTL/CMOS Logic Latch Input
Pin. An asynchronous input signal at this pin latches the
serial data in the shift registers into the proper registers
and the status information is ready to shift out with the
coming clock pulses. See more details in the Operation
section.
V
CC
(Pin 23): Logic and Control Supply Pin. The pin powers
serial data interface and internal control circuitry. Must be
locally bypassed with a capacitor to ground.
PWMCK (Pin 24): Grayscale PWM Dimming TTL/CMOS
Logic Clock Pin. Individual PWM dimming signal is gener
-
ated by counting this clock pulse from zero to the bits in
i
t
s 12-bit grayscale PWM register.
LDO (Pin 25): Serial Interface TTL/CMOS Logic Latch
Output Pin.
SDO (Pin 26): Serial Interface TTL/CMOS Logic Data
Output Pin.
SCKO (Pin 28): Serial Interface TTL/CMOS Logic Clock
Output Pin.
SYNC (Pin 46): Switching Frequency Synchronization
Pin. Synchronizes the internal oscillator frequency to an
external clock applied to the SYNC pin. The SYNC pin is
TTL/CMOS logic compatible. Tie to ground or V
CC
if not
used.
RT (Pin 47): Timing Resistor Pin. Programs the switching
frequency from 200kHz to 1MHz. See Table 2 for the rec
-
ommended R
T
values for common switching frequencies.
SS (Pin 48): Soft Start Pin. Placing a capacitor here pro-
grams soft start timing to limit inductor inrush current
during startup. The soft start cycle will not begin until all
the V
CC
, EN/UVLO, and (V
IN
- V
CAP
) voltages are higher
than their respective UVLO thresholds.
FB (Pin 49): Feedback Pin. The pin is regulated to the
internal band-gap reference 1.205V during startup and
precharging phases. Connect to a resistor divider from
the buck converter output to program the maximum LED
bus voltage. See more details in the Applications Informa-
tion section.
ISN (Pin 50): Negative Inductor Current Sense Pin. The
pin is connected to one terminal of the external inductor
current sensing resistor and the buck converter output
supplying parallel LED channels.
ISP (Pin 51): Positive Inductor Current Sense Pin. The pin
is connected to the inductor and the other terminal of the
external inductor current sensing resistor.
CAP (Pin 52): V
IN
Referenced Regulator Supply Capacitor
Pin. The pin holds the negative terminal of an internal V
IN
referenced 6.8V linear regulator used to bias the gate driver
circuitry. Must be locally bypassed with a capacitor to V
IN
.
GATE (Pin 53): Gate Driver Pin. The pin drives an external
P-channel power MOSFET with a typical peak current of 1A.
Connect this pin to the gate of the power MOSFET with a
short and wide PCB trace to minimize trace inductance.
V
IN
(Pin 54): Power Input Supply Pin. Must be locally
bypassed with a capacitor to ground.
T
SET
(Pin 55): Temperature Threshold Setting Pin. A
resistor to ground programs overtemperature threshold.
See more details in the Applications Information section.
I
SET
(Pin 56): Nominal LED Current Setting Pin. A resistor
to ground programs the nominal LED current for all the
channels. See more details in the Applications Informa-
tion section.
Exposed Pad (Pin 57): Ground Pin. Must be soldered to a
continuous copper ground plane to reduce die temperature
and to increase the power capability of the device.