Datasheet

LT3742
10
3742fa
applicaTions inForMaTion
Power Good Indicators
The PG pin is the open-collector output of an internal
window comparator that is pulled low whenever the FB
pin is not within ±10% of the 800mV internal reference
voltage. Tie the PG pin to any supply less than 30V with
a pull-up resistor that will supply less than 200µA. This
pin will be open when the LT3742 is placed in shutdown
mode regardless of the voltage at the FB pin. The power
good indication is valid only when the LT3742 is enabled
(RUN/SS is high) and V
IN
is 4V or greater.
Output Sequencing and Tracking
The RUN/SS and PG pins can be used together to sequence
the two outputs of the LT3742. Figure 3 shows three
circuits to do this. For the first two cases, controller 1
starts first.
In Figure 2a, controller 2 turns on only after controller
1 has reached within 10% of its final regulation voltage.
A larger value for the soft-start capacitor on RUN/SS2
will provide additional delay between the outputs. One
Figure 2a. Supply Sequencing with Controller 2 Delayed Until After Controller 1 is in Regulation
Figure 2b. Supply Sequencing with Controller 2 Having a Fixed Delay Relative to Controller 1
Figure 2c. Both Conditions Start Up Together with Ratiometic Tracking
LT3742
RUN/SS1
SHDN (REFERENCE)
V
OUT1
5V/DIV
V
OUT2
10V/DIV
5ms/DIV
RUN/SS2
PG1
4.7nF
4.7nF
SHDN
3742 F02a
LT3742
RUN/SS1
RUN/SS2
4.7nF
10nF
SHDN
3742 F02b
SHDN (REFERENCE)
V
OUT1
5V/DIV
V
OUT2
10V/DIV
5ms/DIV
LT3742
RUN/SS1
RUN/SS2
10nF
SHDN
3742 F02c
SHDN (REFERENCE)
V
OUT1
5V/DIV
V
OUT2
10V/DIV
5ms/DIV