Datasheet

LT3692A
30
3692afc
For more information www.linear.com/3692A
CLKOUT Capacitive Loading
A minor drawback to generating a negative rail from the
CLKOUT pin is that the charge pump adds capacitance to
the CLKOUT pin, resulting in an output synchronization
clock signal phase delay. Figures 22 and 23 show the im
-
pact of capacitive loading on the CLKOUT signal rise and
fall times. Note that a typical 10:1 150MHz oscilloscope
probe contributes significant capacitance to the CLKOUT
node, necessitating a low capacitance probe for accurate
measurements. Applications requiring CLKOUT to generate
the negative supply voltage and provide the synchroniza
-
tion clock to other regulators may benefit from buffering
CLKOUT prior to the charge pump circuitr
y.
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing. Design Note 100
shows how to generate a dual (+ and –) output supply
using a buck regulator.
applicaTions inForMaTion
500mV/DIV
40ns/DIV
3692a F22
FREQUENCY: 1.000MHz
CHARGE PUMP
SCOPE PROBE: 15pF
SYNCHRONIZED LT3692A
RT/SYNC PIN
FET PROBE: 2pF
500mV/DIV
20ns/DIV
3692a F23
FREQUENCY: 1.000MHz
CHARGE PUMP
SCOPE PROBE: 15pF
FET PROBE: 2pF
SYNCHRONIZED
LT3692A RT/SYNC PIN
Figure 22. CLKOUT Rise Time
Figure 23. CLKOUT Fall Time