Datasheet

LT3692A
13
3692afc
For more information www.linear.com/3692A
applicaTions inForMaTion
The voltage present at the T
J
pin is proportional to the
junction temperature of the LT3692A. The T
J
pin will be
250mV for a die temperature of 25°C and will have a slope
of 10mV/°C.
Choosing the Output Voltage
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resis
-
tors according to:
R1= R2 •
V
OUT
0.806
– 1






R2 should be 10k or less to avoid bias current errors. Ref-
erence designators refer to the Block Diagram in Figure 1.
Choosing the Switching Frequency
The LT3692A switching frequency is set by resistor R3 in
Figure 1. The R
T/SYNC pin is driven by a 12µA current
source. Setting resistor R3 sets the voltage present at
the RT/SYNC pin which determines the master oscillator
frequency as illustrated in Figure 2. The R3 resistance
(in kΩ) may be calculated from the desired switching
frequency (in kHz) by the equation:
R3 = 1.86E-6 • F
SW
2
+ 2.81E-2 • F
SW
–1.76
for frequencies between 150kHz and 2250kHz. A 0V to
2.5V square wave with the same frequency as the master
oscillator and in phase with channel 1 is output via the
CLKOUT pin. The CLKOUT signal can be used to synchro
-
nize multiple switching regulators.
To alleviate duty cycle restrictions due to minimum switch-
on times, channel 1’
s switching frequency can be divided
from the master clock by 1, 2, 4 or 8 determined by resistor
R
DIV
in Figure 1. Channel 2’s switching frequency is not
affected by the DIV pin. The DIV pin is driven by a 12µA
current source. Setting resistor R
DIV
sets the voltage pres-
ent at the DIV pin which determines the divisor as shown
in Table
1. The DIV pin doesn’t have any input hysteresis
near the ratio thresholds.
Table 1. Channel 1 Divisor vs V
DIV
DIV VOLTAGE FREQUENCY RATIO R
DIV
V
DIV
< 0.5V 1 0
0.5V < V
DIV
< 1.0V 2 61.9k
1.0V < V
DIV
< 1.5V 4 102k
1.5V < V
DIV
8 150k
The switching frequency is typically set as high as pos-
sible to reduce overall solution size. The LT3692A employs
techniques to enhance dropout at high frequencies but
efficiency and
maximum input voltage decrease due to
switching losses and minimum switch-on times.
The maximum recommended frequency can be approxi
-
mated by the equation:
Frequency (Hz) =
V
OUT
+ V
D
V
IN
– V
SW
+ V
D
•
1
t
ON(MIN)
where V
D
is the forward voltage drop of the catch diode (D1
Figure 2), V
SW
is the voltage drop of the internal switch,
and t
ON(MIN)
in the minimum on-time of the switch.
Figure 2. Switching Frequency vs RT/SYNC Resistance
RT/SYNC RESISTANCE (kΩ)
0
0
CLKOUT FREQUENCY (kHz)
250
500
750
1500
1750
2000
2250
2500
20
40
50 80
3692a F02
1000
1250
10 30
60
70