Datasheet

LT3690
9
3690fa
pin FuncTions
SW (Pins 1-4, 23-26, Exposed Pad Pin 27): The SW pin
is the emitter output of the internal highside NPN power
switch (HS) and the drain output of the internal lowside
power N-channel switch (LS). Connect this pin to the
inductor and boost capacitor. This pin is driven up to the
V
IN
voltage by the HS switch during the on-time of the
PWM duty cycle. The inductor current drives the SW pin
negative during the off-time. The on-resistance of the LS
switch and the internal Schottky diode fixes the negative
voltage.
The exposed pad is connected internally with SW pins
1-4, 23-26 and should be soldered to a large copper area
to reduce thermal resistance.
SYNC (Pin 5): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
20% and 80% duty cycle. The synchronizing range is
from 170kHz to 1.5MHz. See the Synchronization section
in the Applications Information section for details. When
not used for synchronization, the SYNC pin can be tied
to ground to select low ripple Burst Mode operation or
tied to the output voltage to select standard PWM mode
.
RT (Pin
7): Oscillator Resistor Input. Connecting a resis-
tor to ground (Pin 10) from this pin sets the switching
frequency.
V
C
(Pin 8): The V
C
pin is the output of the internal error
amplifier. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
FB (Pin 9): The LT3690 regulates the FB pin to 0.8V.
Connect the feedback resistor divider tap to this pin. The
adjacent ground pin (Pin 10) is recommended for the
resistor divider.
SS (Pin 11): The SS pin is used to provide a soft-start
or tracking function. The internal 2µA pull-up current
I
SS
in combination with an external capacitor tied to this
pin creates a voltage ramp. The output voltage tracks to
this voltage. For tracking, tie a resistor divider to this pin
from the tracked output. In undervoltage, overvoltage
and thermal shutdown, the SS pin pulls low if the output
voltage is below the power good threshold to restart the
output voltage with soft-start behavior. Leave this pin
disconnected if unused.
UVLO (Pin 12): Tie a resistor divider between V
IN
, UVLO,
and GND to program an undervoltage lockout threshold.
The
UVLO pin has an accurate 1.25V threshold. Above the
threshold, the part operates normally. Below the threshold,
the part drops into a low quiescent current state. See the
Undervoltage Lockout section in the Applications Informa-
tion section for more details.
V
IN
(Pins 13, 14, 15): The V
IN
pin supplies current to
the LT3690’s internal regulator and to the internal power
switch. This pin must be locally bypassed.
EN (Pin 17): The EN input is used to put the LT3690 in
shutdown mode. Pull to GND to shut down the LT3690.
Tie to 1.5V or more for normal operation.
PG (Pin 18): The PG pin is the open collector output of
an internal comparator. PG remains low until the FB pin is
within 10% of the final regulation voltage. The PG output
is valid when V
IN
is above 3.9V and EN is high.
BIAS (Pin 19): This pin connects to the anode of the internal
boost Schottky diode. BIAS also supplies the current to
the LT3690’s internal regulator. Tie this pin to the lowest
available voltage source above 3V (typically V
OUT
). This
pin must be locally bypassed with 10nF.
V
CCINT
(Pin 20): V
CCINT
is an output of the internally gen-
erated supply voltage for the synchronous power DMOS
transistor driver. An external capacitor C
VCC
must be con-
nected between this pin and ground (Pin 21) to buffer the
internal supply voltage of the LS switch.
BST (Pin 22): This pin is used to provide, with the external
boost capacitor, a drive voltage higher than the input volt-
age V
IN
to the internal bipolar NPN power switch.
GND (Exposed Pad Pin 28, Pin 6, Pin 10, Pin 16, Pin 21):
Ground. The exposed pad is connected internally to GND
Pins 6, 10, 16 and 21, and should be soldered to a large
copper area to reduce thermal resistance.