LT3689/LT3689-5 700mA Step-Down Regulator with Power-On Reset and Watchdog Timer DESCRIPTION FEATURES n n n n n n n n n n n Wide Input Range: Operation from 3.6V to 36V Overvoltage Lockout Protects Circuits through 60V Transients 85µA IQ at 12VIN to 3.3VOUT Low Ripple Burst Mode® Operation Allows Output Ripple <15mVP-P Programmable, Defeatable Watchdog Timer with Window or Timeout Control Programmable Power-On Reset Timer (POR) Synchronizable, Adjustable 350kHz to 2.
LT3689/LT3689-5 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN, EN/UVLO Voltage (Note 2)..................................60V BST Voltage...............................................................60V BST Above SW Voltage..............................................30V OUT, WDE Voltage.....................................................30V FB, RT, SYNC, W/T, WDI, RST, WDO Voltage...............6V CWDT, CPOR Voltage.....................................................
LT3689/LT3689-5 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VOUT = 5V, unless otherwise noted. (Note 3) SYMBOL PARAMETER CONDITIONS MIN VIN Fixed Undervoltage Lockout l VIN Overvoltage Lockout l Quiescent Current from VIN Quiescent Current from OUT LT3689-5 Quiescent Current from VIN LT3689-5 Quiescent Current from OUT 36 TYP MAX UNITS 3.4 3.
LT3689/LT3689-5 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VOUT = 5V, unless otherwise noted. (Note 3) SYMBOL PARAMETER CONDITIONS tUV UV Detect to RST Asserted Step VFB from 0.9V to 0.5V WDI Input Threshold MIN TYP MAX l 10 30 65 µs l 0.4 0.95 1.15 V WDI Input Pull-Up Current UNITS –2 WDI Input Pulse Width l 300 W/T Threshold Voltage l 0.
LT3689/LT3689-5 TYPICAL PERFORMANCE CHARACTERISTICS No-Load Supply Current vs VIN No-Load Supply Current 800 TA = 25°C SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 100 80 60 40 20 0 CATCH DIODE: DIODES INC. B140HB VIN = 12V VOUT = 3.3V 700 120 1.4 600 500 INCREASED SUPPLY CURRENT DUE TO CATCH DIODE LEAKAGE AT HIGH TEMPERATURE 400 300 200 5 10 15 20 25 30 0 –50 –25 40 35 TYPICAL 1.0 0.8 MINIMUM 0.6 0.4 TA = 25°C L = 12µH f = 1MHz 0.2 100 0 Maximum Load Current, 5VOUT 1.
LT3689/LT3689-5 TYPICAL PERFORMANCE CHARACTERISTICS BST Pin Current Output Voltage Feedback Voltage 0.810 25 5.05 5.04 TA = 125°C TA = 25°C 10 5 5.03 0.805 OUTPUT VOLTAGE (V) TA = –50°C 15 FEEDBACK VOLTAGE (V) BST PIN CURRENT (mA) 20 0.800 0.795 5.02 5.01 5.00 4.99 4.98 4.97 4.96 0 0 400 200 600 800 1000 0.790 –50 –25 0 SWITCH CURRENT (mA) 4.
LT3689/LT3689-5 TYPICAL PERFORMANCE CHARACTERISTICS EN/UVLO Pin Current EN/UVLO Pin Threshold 1.300 1.290 TA = –50°C 5 EN/UVLO THRESHOLD (V) EN/UVLO PIN CURRENT (µA) 6 TA = 25°C 4 TA = 150°C 3 2 1 0 Boost Diode Forward Voltage 900 VIN = 12V 800 1.280 BOOST DIODE VOLTAGE (mV) 7 1.270 1.260 1.250 EN/UVLO THRESHOLD RISING 1.240 1.230 EN/UVLO THRESHOLD FALLING 1.220 5 10 15 20 VEN/UVLO (V) 25 30 35 700 TA = 25°C 600 TA = 150°C 500 400 300 200 100 1.210 0 TA = –50°C 1.
LT3689/LT3689-5 TYPICAL PERFORMANCE CHARACTERISTICS Transient Duration vs POR Comparator Overdrive Watchdog Upper Boundary Period UPPER BOUNDARY PERIOD, t WDU (ms) 21 TRANSIENT DURATION (µs) 700 600 500 400 RESET OCCURS ABOVE THE CURVE 300 200 100 0 0.10 1.00 10.00 100.00 POR COMPARATOR OVERDRIVE VOLTAGE AS PERCENTAGE OF RESET THRESHOLD, VRST (%) CWDT = 1nF MURATA: GRM1882C1H102FA01 20 19 18 17 –50 –25 0 Watchdog Lower Boundary Period 7.
LT3689/LT3689-5 PIN FUNCTIONS BST: The BST pin is used to provide drive voltage higher than the input voltage to the internal NPN power switch. VIN: The VIN pin supplies current to the LT3689’s internal circuitry and to the internal power switch and must be locally bypassed. SW: The SW pin is the output of the internal power switch. Connect this pin to the inductor, catch diode and boost capacitor. DA: Tie the DA pin to the anode of the external catch Schottky diode. If the DA pin current exceeds 1.
LT3689/LT3689-5 BLOCK DIAGRAM VIN VIN C1 – + INTERNAL 0.8VREF EN/UVLO Σ OUT SLOPE COMP SWITCH LATCH R RT OSCILLATOR RT BST S SYNC C2 Q L1 SW DISABLE SOFT-START VOUT R1 OUT LT3689-5 ONLY FB R2 Burst Mode OPERATION DETECT ERROR AMP VC + – 525k DA C3 RSEN VC CLAMP GND RC 100k D1 VOUT CC WDE 2µA WDI TRANSITION DETECT CWDT WATCHDOG TIMER W/T 22µA + OUT 80mV 1µA FB WDO – + OUT VIN ADJUSTABLE RESET PULSE GENERATOR 1µA – 2µA 3.
LT3689/LT3689-5 TIMING DIAGRAMS VOUT VUV tUV tRST RST POWER-ON RESET TIMING WDI WDO tWDU tRST WATCHDOG TIMING (W/T = HIGH), TIMEOUT MODE t < t WDL tRST WDI WDO 3689 TD tRST tWDU WATCHDOG TIMING (W/T = LOW), WINDOW MODE tUV = TIME REQUIRED TO ASSERT RST LOW ONCE VOUT GOES BELOW VUV tRST = PROGRAMMED RESET PERIOD tWDU = WATCHDOG UPPER BOUNDARY PERIOD tWDL = WATCHDOG WINDOW MODE LOWER BOUNDARY PERIOD VUV = OUTPUT VOLTAGE RESET THRESHOLD 3689fe For more information www.linear.
LT3689/LT3689-5 OPERATION The LT3689 is a constant-frequency, current mode stepdown regulator with a watchdog and a reset timer that allows microprocessor supervisory functions. Operation can be best understood by referring to the Block Diagram. Keeping the EN/UVLO pin at ground completely shuts off the part drawing minimal current from the VIN source. To turn on the internal bandgap and the rest of the logic circuitry, raise the EN/UVLO pin above the accurate threshold of 1.26V.
LT3689/LT3689-5 APPLICATIONS INFORMATION The output voltage is programmed with a resistor divider between the output and the FB pin. Choose 1% resistors according to: R1= R2 VOUT 1 0.8V For reference designators, refer to the Block Diagram. Setting the Switching Frequency The LT3689 uses a constant-frequency PWM architecture that can be programmed to switch from 350kHz to 2.2MHz by using a resistor tied from the RT pin to ground. Table 1 shows the RT values for various switching frequencies. Table 1.
LT3689/LT3689-5 APPLICATIONS INFORMATION Maximum Operating Voltage The maximum input voltage for LT3689 applications depends on switching frequency, the absolute maximum ratings of the VIN and BST pins, and by the minimum duty cycle (DCMIN). The LT3689 can operate from input voltages up to 36V, and safely withstand input transient voltages up to 60V. Note that while VIN > 38V (typical), the LT3689 will stop switching, allowing the output to fall out of regulation.
LT3689/LT3689-5 APPLICATIONS INFORMATION this condition and forces the switch to turn off, allowing the inductor current to charge up the boost capacitor. This places a limitation on the maximum duty cycle. The maximum duty cycle that the LT3689 can sustain is 90%. From this DCMAX number, the minimum operating voltage can be calculated using the following equation: VOUT + VD − VD + VSW 0.90 Example: VOUT = 3.3V VIN(MIN) = VIN(MIN) = 3.3V + 0.4V – 0.4V + 0.4V = 4.1V 0.
LT3689/LT3689-5 APPLICATIONS INFORMATION Choose an inductor using the previous inductor selection equation to guarantee 700mA of output current. If using a smaller inductor, check the DA current limit equation to verify that the DA circuitry will not lower the switching frequency. When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop.
LT3689/LT3689-5 APPLICATIONS INFORMATION LT3689 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT3689’s voltage rating. For a complete discussion, see Linear Technology’s Application Note 88. Output Capacitor and Output Ripple The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT3689 to produce the DC output.
LT3689/LT3689-5 APPLICATIONS INFORMATION Frequency Compensation Table 4. Diode Vendors PART NUMBER VR (V) IAVE (A) VF AT IAVE (mV) On Semiconductor MBRM120E MBRM140 20 40 1 1 530 550 Diodes Inc. B120 B130 B140 B0540W B140HB 20 30 40 40 40 1 1 1 0.5 1 500 500 500 510 530 Ceramic Capacitors Ceramic capacitors are small, robust and have very low ESR. However, ceramic capacitors can cause problems when used with the LT3689 due to their piezoelectric nature.
LT3689/LT3689-5 APPLICATIONS INFORMATION Most applications running at VIN greater than 20V will require a small phase lead capacitor, ranging from 2pF to about 30pF, between the FB pin and VOUT for good transient response. The circuits in the Typical Applications section use the appropriate phase lead capacitors and are stable at all input voltages.
LT3689/LT3689-5 APPLICATIONS INFORMATION BST and OUT Pin Considerations Capacitor C3 and the internal boost Schottky diode (see the Block Diagram) are used to generate a boost voltage that is higher than the input voltage. In most cases, a 0.1µF capacitor will work well. Figure 6 shows three ways to arrange the boost circuit. The BST pin must be more than 2.3V above the SW pin for best efficiency. For outputs of 3V and above, the standard circuit (Figure 6a) is best. For outputs between 2.
LT3689/LT3689-5 APPLICATIONS INFORMATION Another way to lower the start-up voltage is by using a resistor divider on the EN/UVLO pin (see the Shutdown and Undervoltage Lockout section). A resistor divider on EN/UVLO pin programs the turn-on threshold to slightly higher than the minimum VIN voltage required to run at full load. Below the EN/UVLO high voltage, the part will stay shut off and the output cap will remain discharged during the worse case slow VIN ramp.
LT3689/LT3689-5 APPLICATIONS INFORMATION Synchronization To select low ripple Burst Mode operation, tie the SYNC pin below 0.3V (this can be ground or a logic output). Synchronizing the LT3689 oscillator to an external frequency can be done by connecting a square wave (with positive and negative pulse width >80ns) to the SYNC pin. The square wave amplitude should have valleys that are below 0.3V and peaks that are above 1V (up to 6V).
LT3689/LT3689-5 APPLICATIONS INFORMATION Example: switching should not start until the input is above 4.40V, and is to stop if the input falls below 4V. V H = 4.40V,V L = 4V R3 = 4.40V − 4V − 4k = 95.3k 4µA Characteristics section). This prevents spurious resets caused by output voltage transients such as load steps or short brownout conditions without sacrificing the DC reset threshold accuracy. Watchdog 1.26V = 43.2k R4 = 4.40V −1.26V – 4µA (Nearest 1% Resistor) 95.
LT3689/LT3689-5 APPLICATIONS INFORMATION In both watchdog modes, when WDO is asserted, the reset timer is enabled. Any WDI pulses that appear while the reset timer is running are ignored. When the reset timer expires, the WDO is allowed to go high again. Therefore, if no input is applied to the WDI pin, then the watchdog circuitry produces a train of pulses on the WDO pin. The high time of this pulse train is equal to the timeout period, and low time is equal to the reset period.
LT3689/LT3689-5 APPLICATIONS INFORMATION capacitor leakage (the nominal charging current is 2µA) and capacitor tolerance. A low leakage ceramic capacitor is recommended. Selecting the Watchdog Timing Capacitor The watchdog timeout period is adjustable and can be optimized for software execution. The watchdog upper boundary timeout period, tWDU is adjusted by connecting a capacitor, CWDT, between the CWDT pin and ground.
LT3689/LT3689-5 APPLICATIONS INFORMATION FB 0.72V CPOR RST COUNTER 1 3 2 4 tRST RST tWDU CWTD ••• 0.2V WDT COUNTER 1 WATCH DOG INPUT IS IGNORED WDO 2 0.2V 30 31 WATCH DOG INPUT MUST TRANSITION LOW AT LEAST ONCE IN THIS PERIOD 32 3689 F13a (13a) W/T = Low. The First Valid Negative Edge on WDI Must Occur Before the Watchdog Timer Expires tWDU tWDL WDI ••• CWDT 1 2 30 0.2V 32 31 WATCH DOG INPUT MUST TRANSITION LOW AT LEAST ONCE IN THIS PERIOD WDO 3689 F13b (13b) W/T = Low.
LT3689/LT3689-5 APPLICATIONS INFORMATION FB 0.72V CPOR 1 RST COUNTER 3 2 4 tRST RST tWDU ••• CWTD 0.2V 1 WDT COUNTER WDO WATCH DOG INPUT IS IGNORED 2 30 0.2V 31 WATCH DOG INPUT MUST TRANSITION LOW AT LEAST ONCE IN THIS PERIOD 32 3689 F14a (14a) W/T = High. The First Valid Negative Edge on WDI Must Occur Before the Watchdog Timer Expires tWDU WDI ••• CWDT 1 WDT COUNTER 2 30 0.
LT3689/LT3689-5 APPLICATIONS INFORMATION If there is a timing fault, the WDO pin will flag, low, and will initiate a restart sequence using the power-on-reset timer, as shown in Figure 14c. The RST pin will remain high, however. WDI edges are ignored until the power-onreset timer expires, and the CWDT pin has risen above 0.2V for the first time. After that time, there must be an edge on the WDI pin before the watchdog timer expires, which will happen within tWDU.
LT3689/LT3689-5 APPLICATIONS INFORMATION ground traces will shield them from the SW and BOOST nodes. The Exposed Pad on the bottom of the package must be soldered to ground so that the pad acts as a heat sink. To keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the LT3689 to additional ground planes within the circuit board and on the bottom side. be derated as the ambient temperature approaches 125°C (150°C for H-grade).
LT3689/LT3689-5 TYPICAL APPLICATIONS 3.3V Step-Down Converter VIN 4.5V TO 36V TRANSIENT TO 60V C1 2.2µF WINDOW TIMEOUT WATCHDOG_DEFEAT µP EN/UVLO OUT BST VIN W/T WDE I/O WDI I/O WDO LT3689 SW C6 10nF tWDU = 182ms R1 316k DA FB RT SYNC CWDT CPOR R2 100k GND C5 68nF tRST = 157ms L1 12µH C4 10pF D1 RST RESET C2 0.1µF 3.3V 700mA C3 22µF RT 20.5k fSW = 700kHz 3689 TA03 L1: CDR125NP-12MC D1: MBRM140 C1, C2, C3: X7R or X5R 5V, 2MHz Step-Down Converter VIN 6.
LT3689/LT3689-5 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev C) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ± 0.102 (.112 ± .004) 5.23 (.206) MIN 2.845 ± 0.102 (.112 ± .004) 0.889 ± 0.127 (.035 ± .005) 8 1 1.651 ± 0.102 (.065 ± .004) 1.651 ± 0.102 3.20 – 3.45 (.065 ± .004) (.126 – .136) 0.305 ± 0.038 (.0120 ± .0015) TYP 16 0.50 (.0197) BSC 4.039 ± 0.102 (.159 ± .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.
LT3689/LT3689-5 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 ±0.05 3.50 ± 0.05 1.45 ± 0.05 2.10 ± 0.05 (4 SIDES) PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.20 TYP OR 0.25 × 45° CHAMFER R = 0.115 TYP 0.75 ± 0.05 15 PIN 1 TOP MARK (NOTE 6) 16 0.40 ± 0.10 1 1.45 ± 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 NOTE: 1.
LT3689/LT3689-5 REVISION HISTORY REV DATE DESCRIPTION A 4/10 Added LT3689-5 Fixed Output Voltage Option PAGE NUMBER B 9/10 Revised conditions for tSW(OFF) and VOL in Electrical Characteristics section. 3 C 10/10 Removed connection from OUT to GND in 5V, 2MHz Step-Down Converter drawing in Typical Applications section. 28 D 2/11 Replaced Figure 12 in the Applications Information section.
LT3689/LT3689-5 TYPICAL APPLICATION 1.8V Step-Down Converter with System Reset Generated by Watchdog Timing or Output Voltage Failure VIN 3.6V TO 16V TRANSIENT TO 27V C1 1µF WINDOW TIMEOUT WATCHDOG_DEFEAT µP I/O WDE WDI WDO L1: WE-PD2: 7447745047 D1: MBRM140 C1, C2, C3: X7R OR X5R LT3689 SW C5 68nF tRST = 157ms L1 4.7µH C2 0.1µF DA FB RT SYNC CWDT CPOR GND fSW = 900kHz 1.8V 700mA C4 15pF D1 RST RESET C6 10nF tWDU = 182ms EN/UVLO OUT BST VIN W/T R1 127k RT 14.
