Datasheet
LT3688
9
3688f
PIN FUNCTIONS
(QFN/TSSOP)
C
POR1
, C
POR2
(Pins 23, 21/Pins 20, 18): Place a capacitor
between this pin and ground to set the power-on-reset
timeout period.
C
WDT
(Pin 24/Pin 21): Place a capacitor between this pin
and ground to set the fast and slow watchdog timer periods.
Exposed Pad (Pin 25/Pin 25): Ground. Tie the exposed
pad directly to the ground plane. The exposed pad metal
of the package provides both electrical contact to ground
and good thermal contact to the printed circuit board. The
device must be soldered to the circuit board for proper
operation.
BLOCK DIAGRAM
+
–
+
–
+
–
+
BST2
SW2
DA2
R
SEN2
DISABLE
Q
S
R
RT
R
T
SLAVE
OSCILLATOR
MASTER
OSCILLATOR
INTERNAL
0.8V REF
ERROR
AMP
SLOPE COMP
SWITCH
LATCH
Burst Mode
OPERATION
DETECT
ADJUSTABLE
RESET PULSE
GENERATOR
V
C
CLAMP
C5
C
C
V
IN
3.4V
R
C
V
C
C4
OUT2
L2
FB2
RUN/SS2
C
POR2
2.5µA
22µA
3688 BD01
RST2
BIAS
OUT1
SYNCV
IN
V
IN
EN/UVLO
ON OFF
+
–
+
–
+
–
+
BST1
SW1
DA1
R
SEN1
Q
S
R
SLAVE
OSCILLATOR
CONFIGURATION
LOGIC
WATCHDOG
TIMER
TRANSITION
DETECT
SLOPE COMP
SWITCH
LATCH
Burst Mode
OPERATION
DETECT
ADJUSTABLE
RESET PULSE
GENERATOR
V
C
CLAMP
OUT1
FB1
R2
R1
C2
C3
L1
RUN/SS1
C
POR1
2.5µA
2µA
22µA
22µA
RST1
C
WDT
WDEWDI WDO CONFIG GND
THREE-STATE
DECODE
+
–
+
–
80mV
C1