Datasheet

LT3688
18
3688f
Low Ripple Burst Mode Operation
To enhance effi ciency at light loads, the LT3688 operates
in low ripple Burst Mode operation that keeps the output
capacitor charged to the proper voltage while minimizing
the input quiescent current. During Burst Mode opera-
tion, the LT3688 delivers single cycle bursts of current
to the output capacitor followed by sleep periods where
the output power is delivered to the load by the output
capacitor. Because the LT3688 delivers power to the
output with single, low current pulses, the output ripple
is kept below 25mV for a typical application. In addition,
V
IN
and BIAS quiescent currents are reduced to typically
65A and 155A, respectively, during the sleep time. As
the load current decreases towards a no-load condition,
the percentage of time that the LT3688 operates in sleep
mode increases and the average input current is greatly
reduced, resulting in high effi ciency even at very low loads
(see Figure 5). At higher output loads the LT3688 will be
running at the frequency programmed by the R
T
resistor,
and will be operating in standard PWM mode. The transi-
tion between PWM and low ripple Burst Mode operation
is seamless, and will not disturb the output voltage. The
front page application circuit will switch at full frequency
at output loads higher than about 60mA.
I
L
0.2A/DIV
V
SW
5V/DIV
V
OUT
10mV/DIV
5µs/DIV
3688 F05
Figure 5. Burst Mode Operation
BST and BIAS Pin Considerations
Capacitor C3 and the internal boost Schottky diodes (see
the Block Diagram) are used to generate boost voltages
that are higher than the input voltage. In most cases, a
0.22F capacitor will work well. For the best performance
in dropout, use a 1µF or larger capacitor. Figure 6 shows
V
IN
BST
SW
BIAS
V
IN
V
OUT
4.7µF
C3
GND
LT3688
(6a) For V
OUT
> 2.8V
Figure 6. Three Circuits for Generating the Boost Voltage
V
IN
BST
SW
BIAS
V
IN
V
OUT
4.7µF
C3
D2
GND
LT3688
(6b) For 2.5V < V
OUT
< 2.8V
V
IN
BST
SW
BIAS
V
IN
V
OUT
4.7µF
C3
GND
LT3688
3688 F06
(6c) For V
OUT
< 2.5V; V
IN(MAX)
= 30V
APPLICATIONS INFORMATION
three ways to arrange the boost circuit. The BST pin must
be more than 2.3V above the SW pin for best effi ciency.
For outputs of 3V and above, the standard circuit (Figure
6a) is best. For outputs between 2.8V and 3V, use a 1F
boost capacitor. A 2.5V output presents a special case
because it is marginally adequate to support the boosted
drive stage while using the internal boost diode. For reliable
BST pin operation with 2.5V outputs, use a good external
Schottky diode (such as the ON semi MBR0540), and a
1F boost capacitor (see Figure 6b). For lower output
voltages, the boost diode can be tied to the input (Figure
6c), or to another supply greater than 2.8V. The circuit in
Figure 6a is more effi cient because the BST pin current
and BIAS pin quiescent current comes from a lower volt-