Datasheet

LT3681
17
3681f
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 9 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
fl ow in the LT3681’s V
IN
and SW pins, the integrated
Schottky diode the input capacitor (C
IN
) and the output
capacitor (C
OUT
). The loop formed by these components
should be as small as possible. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation
1
2
14
13
3
4
12
11
10
9
8
VIAS TO GND
VIAS TO V
OUT
VIAS TO V
IN
VIAS TO DC HEATSINK
5
6
7
V
IN
C
IN
C
OUT
3681 F11
unbroken ground plane below these components. The SW
and BOOST nodes should be as small as possible. Finally,
keep the FB and V
C
nodes small so that the ground traces
will shield them from the SW and BOOST nodes. Each of
the Exposed Pads on the bottom of the package must be
soldered to copper pours so that the pad acts as a heat
sink. To keep thermal resistance low, extend the ground
plane as much as possible, and add thermal vias under
and near the LT3681 to additional ground planes within
the circuit board and on the bottom side. Keep in mind
that the thermal design must keep the junctions of the IC
and power diode below the specifi ed absolute maximum
temperature of 125°C.
APPLICATIONS INFORMATION