Datasheet

LT3680
16
Rev C
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Synchronizing the LT3680 oscillator to an external fre-
quency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.3V
and peaks that are above 0.8V (up to 6V).
The LT3680 will not enter Burst Mode at low output loads
while synchronized to an external clock, but instead will
skip pulses to maintain regulation.
The LT3680 may be synchronized over a 250kHz to
2MHz range. The R
T
resistor should be chosen to set
the LT3680 switching frequency 20% below the lowest
synchronization input. For example, if the synchronization
signal will be 250kHz and higher, the R
T
should be cho-
sen for 200kHz. To assure reliable and safe operation the
LT3680 will only synchronize when the output voltage is
near regulation as indicated by the PG flag. It is therefore
necessary to choose a large enough inductor value to
supply the required output current at the frequency set
by the R
T
resistor. See Inductor Selection section. It is
also important to note that slope compensation is set by
the R
T
value: When the sync frequency is much higher
than the one set by R
T
, the slope compensation will be
significantly reduced which may require a larger inductor
value to prevent subharmonic oscillation.
Shorted and Reversed Input Protection
If the inductor is chosen so that it won’t saturate exces
-
sively, an LT3680 buck regulator will tolerate a shorted
output. There is another situation to consider in systems
where the output will be held high when the input to the
LT3680 is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode OR-ed with the LT3680’s
output. If the V
IN
pin is allowed to float and the RUN/SS
pin is held high (either by a logic signal or because it is
tied to V
IN
), then the LT3680’s internal circuitry will pull
its quiescent current through its SW pin. This is fine if
your system can tolerate a few mA in this state. If you
ground the RUN/SS pin, the SW pin current will drop to
essentially zero. However, if the V
IN
pin is grounded while
the output is held high, then parasitic diodes inside the
LT3680 can pull large currents from the output through
the SW pin and the V
IN
pin. Figure 8 shows a circuit that
will run only when the input voltage is present and that
protects against a shorted or reversed input.
Figure 8. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LT3680
Runs Only When the Input is Present
V
IN
BOOST
GND FB
RUN/SS
V
C
SW
D4
MBRS140
V
IN
LT3680
3680 F08
V
OUT
BACKUP
APPLICATIONS INFORMATION
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 9 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT3680’s V
IN
and SW pins, the catch
diode (D1) and the input capacitor (C1). The loop formed
by these components should be as small as possible.
These components, along with the inductor and output
capacitor, should be placed on the same side of the circuit
board, and their connections should be made on that layer.
Place a local, unbroken ground plane below these com-
ponents. The SW and BOOST nodes should be as small
as possible. Finally, keep the FB and V
C
nodes small so
Figure 7. To Soft-Start the LT3680, Add a Resisitor
and Capacitor to the RUN/SS Pin
3680 F07
I
L
1A/DIV
V
RUN/SS
2V/DIV
V
OUT
2V/DIV
RUN/SS
GND
RUN
15k
2ms/DIV
0.22µF
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