Datasheet

LT3582/LT3582-5/LT3582-12
15
3582512fb
several start-up issues have occurred: A) the expected
V
OUTP
ramp up path is not followed B) inductor current
ringing occurs C) the V
OUTP
ramp rate is limited due to
the output disconnect current limit being reached D) ad-
ditional ringing occurs when the CAPP pin starts charging
E) output voltage overshoot occurs because the inductor
currents are maximized during the output ramp-up.
In some cases it may be desirable to use only one RAMP
pin capacitor. In cases where PUSEQ = 11 (see the
Power-
Up Sequencing
section) the RAMPP and RAMPN pins
can be connected together and to a single capacitor. In
this case the capacitor will charge with twice the current
confi gured by the IRMP bits.
Ramping V
OUTP
from Ground: The LT3582 series has
the unique ability to generate a smooth V
OUTP
voltage
ramp starting from ground and continuing all the way up
to regulation (see Figure 6). This ability is not possible
with typical Boost converters in which the output is taken
from the cathode of the Schottky diode (CAPP node in
Figure 5).
L1
D1
SWP
C1
V
OUTP
C3
V
IN
C2
CAPP
LT3582
SERIES
DISCONNECT
CONTROL
LOAD
3582512 F05
APPLICATIONS INFORMATION
The LT3582 series incorporates an output disconnect
PMOS allowing V
OUTP
to be grounded during shutdown.
Once enabled, the Disconnect Control circuit actively
drives the PMOS gate allowing V
OUTP
to ramp up linearly
as shown in Figure 6. Once V
OUTP
reaches regulation,
the PMOS is fully turned “on” to reduce resistance and
improve effi ciency.
Power-Up Sequencing (PUSEQ bits)
Once enabled, the part requires a delay of T
START-UP
(64s
typ) to properly confi gure itself. Once confi gured, the order
in which V
OUTP
and V
OUTN
ramp to regulation is controlled
by the PUSEQ bits. The combinations available for the
LT3582 are shown in Table 2. The LT3582-5/LT3582-12
are pre-confi gured with the 11 combination.
Table 2. Power-Up Sequences
PUSEQ[1:0] Power-Up Sequence
00 Outputs are disabled, neither output ramps up
01 V
OUTN
ramps up 1st, followed by V
OUTP
10 V
OUTP
ramps up 1st, followed by V
OUTN
11 Both V
OUTP
and V
OUTN
ramp-up starting at the same time.
Selecting the 01 or 10 combinations cause one of the out-
puts to start ramping shortly after SHDN rises. The ramp
rate of V
OUT
is controlled by the RAMP pin as discussed
in the Soft-Start section. After V
OUT
nears its target regula-
Figure 5. Boost Converter Topology
Figure 6. V
OUTP
Soft-Start Ramping from Ground
Figure 7. V
OUTP
Soft-Start with Excessive Ramp Rate
3582512 F06
CAPP
2V/DIV
I
L2
0.2A/DIV
V
RAMPP
0.2V/DIV
V
OUTP
2V/DIV
1ms/DIV
3582512 F07
V
OUTP
3V/DIV
V
RAMPP
0.5V/DIV
CAPP
3V/DIV
I
L2
0.2A/DIV
50μs/DIV
A
C
E
BD