Datasheet
LT3581
20
3581fa
For more information www.linear.com/LT3581
applicaTions inForMaTion
• The slave switch, by not performing a current sense
operation like the master switch, can sustain fairly large
current spikes when the flying capacitors charge up.
Since this current spike flows through SW2, it does
not affect the operation of the current comparator (A4
in Block Diagram).
• The master switch, immune from the capacitor current
spike (seen only by the slave switch) can sense the
inductor current more accurately.
• Since the slave switch can sustain large current spikes,
the diodes that feed current into the flying capacitors do
not need current limiting resistors, leading to efficiency
and thermal improvements.
High V
OUT
Charge Pump Topology
The LT3581 can be used in a charge-pump topology as
shown in Figure 12, multiplying the output of an inductive
boost converter. The master switch (SW1) can be used to
drive the inductive boost converter (first stage of charge
pump), while the slave switch (SW2) can be used to drive
one or more other charge pump stages. This topology is
useful for high voltage applications including VFD bias
supplies.
Single Inductor Inverting Topology
If there is a need to use just one inductor to generate a
negative output voltage whose magnitude is greater than
V
IN
, the single inductor inverting topology (shown in Figure
13) can be used. Since the master and slave switches are
isolated by a Schottky diode, the current spike through C1
will flow only through the slave switch, thereby preventing
the current comparator, (A4 in the Block Diagram), from
falsely tripping. Output disconnect is inherently built into
the single inductor topology.
V
IN
12V
V
OUT2
97V
140mA
V
OUT1
65V
70mA
24k
2.2µF
10µH
2.2µF
2.2µF
0.47µF
43.2k
100pF
1nF
100k
2.2µF
370k
SW1 SW2
FB
V
C
SS
GND
SYNC
GATE
CLKOUT
V
IN
RT
FAULT
SHDN
LT3581
3581 F12
8.06k
2.2µF
2.2µF
2.2µF
Figure 12. High V
OUT
Charge Pump Topology Can Be Used to
Build VFD Bias Supplies
ENABLE
C
VC2
V
IN
C
OUT
V
OUT
< 0V
AND |V
OUT
| > |V
IN
|
SW1 SW2
GATE FB
V
C
SS
GND
SYNC
CLKOUTV
IN
RT
FAULT
SHDN
LT3581
100k
L1
D1
D2
D3
C1
R
FB
C
VC1
C
SS
C
IN
R
VC
R
T
3579 F13
Figure 13. Single Inductor Inverting Topology