Datasheet
LT3581
14
3581fa
For more information www.linear.com/LT3581
applicaTions inForMaTion
Figure 6. SEPIC Converter – The Component Values and Voltages
Given Are Typical Values for a 700kHz, Wide Input Range (3V to
16V) SEPIC Converter with 5V Out
SEPIC CONVERTER COMPONENT SELECTION
(COUPLED OR UN-COUPLED INDUCTORS)
The LT3581 can also be configured as a SEPIC as shown in
Figure 6. This topology allows for positive output voltages
that are lower, equal, or higher than the input voltage. Out
-
put disconnect is inherently built into the SEPIC topology,
meaning no DC path exists between the input and output
due to capacitor C1. This implies that a PMOS controlled
by the GATE pin is not required in the power path.
Table 2 is a step-by-step set of equations to calculate
component values for the LT3581 when operating as a
SEPIC converter. Input parameters are input and output
voltage, and switching frequency (V
IN
, V
OUT
and f
OSC
re-
spectively). Refer to the Appendix for further information
on the design equations presented in Table 2.
V
ariable Definitions:
V
IN
= Input Voltage
V
OUT
= Output Voltage
DC = Power Switch Duty Cycle
f
OSC
= Switching Frequency
I
OUT
= Maximum Average Output Current
I
RIPPLE
= Inductor Ripple Current
Table 2. SEPIC Design Equations
PARAMETERS/EQUATIONS
Step 1:
Inputs
Pick V
IN
, V
OUT
, and f
OSC
to calculate equations below.
Step 2:
DC
DC
VV
VV
VV
OUT
IN OUT
≅
+
++
05
05 03
.
.–.
Step 3:
L
L
VVDC
fA
L
VV
TYP
IN
OSC
MIN
IN
=
()
•
•
=
()
••
–.
–.
03
1
03 2
DDC
Af DC
L
VVDC
f
OSC
MAX
IN
O
–
.–
–.
1
22 1
03
()
••
()
=
()
•
SSC
A• 035.
(1)
(2)
(3)
• Pick L out of a range of inductor values where the minimum
value of the range is set by L
TYP
or L
MIN
, whichever is higher.
The maximum value of the range is set by L
MAX
. See
Appendix on how to choose current rating for inductor value
chosen.
• Pick L1 = L2 = L for coupled inductors.
• Pick L1L2 = L for un-coupled inductors.
Step 4:
I
RIPPLE
I
VV
DC
fL
RIPPLE
IN
OSC
=
()
•
•
–.03
• L = L1 = L2 for coupled inductors.
• L = L1L2 for un-coupled inductors.
Step 5:
I
OUT
IA
I
DC
OUT
RIPPLE
=
•
()
33
2
1.– –
Step 6:
D1
VVVI I
RIN OUT AVG OUT
>+ >;
Step 7:
C1
CµFV V
RATING IN
11≥≥;
Step 8:
C
OUT
C
IDC
fV
OUT
OUT
OSC OUT
≥
•
••
0 005.
Step 9:
C
IN
CC C
ADC
fV
I
IN VINPWR
OSCIN
RIP
≥+ ≥
•
•• •
+
33
45 0 005
.
.
PPLE
OSCIN
fV
80005••.•
• Refer to Input Capacitor Selection in Appendix for definition
of C
VIN
and C
PWR
.
Step 10:
R
FB
R
VV
µA
FB
OUT
=
–.
.
1 215
83 3
Step 11:
R
T
R
f
finMHz andR in k
T
OSC
OS
CT
=
87 6
1
.
–; Ω
Note 1: The maximum design target for peak switch current is 3.3A and is
used in this table.
Note 2: The final values for C
OUT
, C
IN
and C1 may deviate from the above
equations in order to obtain desired load transient performance.
D1
30V, 2A
V
IN
3V TO 16V
R
FAULT
100k
R
T
124k
L1
3.3µH
3581 F06
C
SS
1µF
C
OUT
22µF
×2
L2
3.3µH
C
IN
22µF
V
OUT
5V
I
OUT
< 0.9A (V
IN
= 3V)
I
OUT
< 1.5A (V
IN
= 12V)
SW1 SW2
FB
CLKOUT
GATE
V
C
SS
V
IN
RT
GND
SYNC
FAULT
SHDN
ENABLE
LT3581
C
F
100pF
C1
1µF
R
FB
45.3k
•
•
C
C
2.2nF
R
C
7.87k