Datasheet

LT3581
12
3581fa
For more information www.linear.com/LT3581
operaTion
Refer to the State Diagram (Figure 2) for the following
description of the LT3581’s operation during a fault event.
When a fault is detected, in addition to the FAULT pin being
pulled low internally, the LT3581 also disables its CLKOUT
pin, turns off its power switches, and the GATE pin becomes
high impedance. The external PMOS, M1, turns off when
the gate of M1 is pulled up to its source by the external
R
GATE
resistor (see Block Diagram). With the external
PMOS turned off, the power path from V
IN
to V
OUT
is cut
off, protecting power components downstream.
At the same time, a timeout sequence commences where
the SS pin is charged up to 1.8V (the SS pin will continue
charging up to 2.1V and be held there in the case of a
FAULT1 event that has still not ended), and then discharged
to 50mV. This timeout period relieves the part, the PMOS,
and other downstream power components from electrical
Figure 4. Output Short Circuit Protection of the LT3581
V
OUT
10V/DIV
V
CLKOUT
2V/DIV
I
L
2A/DIV
V
FAULT
5V/DIV
3581 F04
5µs/DIV
and thermal stress for a minimum amount of time as set
by the voltage ramp rate on the SS pin.
In the absence of faults, the FAULT pin is pulled high by the
external R
FAULT
resistor (typically 100k). Figure 4 shows
the events that accompany the detection of an output
short on the LT3581.