Datasheet

LT3579/LT3579-1
26
35791fa
For more information www.linear.com/LT3579
APPENDIX
Table 5. Inductor Manufacturers
Vishay IHLP-2020BZ-01 and
IHLP-2525CZ-01 Series
www.vishay.com
Coilcraft XLP, MLC and MSS Series www.coilcraft.com
Cooper Bussmann DRQ125 and DRQ127
Series
www.cooperbussmann.
com
Sumida CDRH series www.sumida.com
TDK RLF and SLF series www.tdk.com
Würth WE-PD, WE-PDF, WE-HC
and WE-DD Series
www.we-online.com
Minimum Inductance
Although there can be a tradeoff with efficiency, it is often
desirable to minimize board space by choosing smaller
inductors. When choosing an inductor, there are three
conditions that limit the minimum inductance; (1) providing
adequate load current, (2) avoidance of subharmonic
oscillation, and (3) supplying a minimum ripple current
to avoid false tripping of the current comparator.
Adequate Load Current
Small value inductors result in increased ripple currents and
thus, due to the limited peak switch current, decrease the
average current that can be provided to the load. In order
to provide adequate load current, L should be at least:
L
BOOST
>
DC • V
IN
− V
CESAT
( )
2• f
OSC
• I
PK
−
V
OUT
•I
OUT
V
IN
• η






or
L
DUAL
>
DC • V
IN
− V
CESAT
( )
2• f
OSC
• I
PK
−
|V
OUT
|•I
OUT
V
IN
• η
−I
OUT






Boost
Topology
SEPIC
or
Inverting
Topologies
where:
L
BOOST
= L1 for Boost Topologies (see Figure 6)
L
DUAL
= L1 = L2 for Coupled Dual Inductor
Topologies (see Figures 7 and 8)
L
DUAL
= L1 || L2 for Uncoupled Dual Inductor
Topologies (see Figures 7 and 8)
DC = Switch Duty Cycle (see Power Switch Duty
Cycle section in Appendix)
I
PK
= Maximum Peak Switch Current; Should
Not Exceed 6A for a Combined SW1 +
SW2 Current or 3.4A of SW1 Current (see
Electrical Characteristics section.)
η = Power Conversion Efficiency (typically 90%
for Boost and 85% for Dual Inductor
Topologies at high currents)
f
OSC
= Switching Frequency
I
OUT
= Maximum Output Current
Negative values of L
BOOST
or L
DUAL
indicate that the
output load current, I
OUT
, exceeds the switch current limit
capability of the LT3579.
Avoiding Sub-Harmonic Oscillations
The LT3579’s internal slope compensation circuit will
prevent sub-harmonic oscillations that can occur when
the duty cycle is greater than 50%, provided that the
inductance exceeds a minimum value. In applications that
operate with duty cycles greater than 50%, the inductance
must be at least:
L
MIN
=
V
IN
− V
CESAT
( )
• 2 • DC −1
( )
4A• f
OSC
• 1− DC
( )
where:
L
MIN
= L1 for Boost Topologies (see Figure 6)
L
MIN
= L1 = L2 for Coupled Dual Inductor
Topologies (see Figures 7 and 8)
L
MIN
= L1 || L2 for Uncoupled Dual Inductor
Topologies (see Figures 7 and 8)