Datasheet

LT3579/LT3579-1
23
35791fa
For more information www.linear.com/LT3579
APPLICATIONS INFORMATION
CHARGE PUMP AIDED REGULATORS
Designing charge pumps with the LT3579 can offer efficient
solutions with fewer components than traditional circuits
because of the master/slave switch configuration on the
IC. The current in the master switch (SW1) is sensed by
the current comparator (A4 in Block Diagram), but the
current in the slave switch (SW2) is not. Note that the slave
switch, SW2, operates in phase with SW1. This method
of operation by the master/slave switches can offer the
following benefits to charge pump designs:
• The slave switch, by not performing a current sense
operation like the master switch, can sustain fairly
large current spikes when the flying capacitors charge
up. Since this current spike flows through SW2, it
does not affect the operation of the current comparator
(A4 in Block Diagram).
• The master switch, immune from the capacitor current
spike, can sense the inductor current more accurately.
• Since the slave switch can sustain large current spikes,
the diodes that feed current into the flying capacitors
do not need current limiting resistors, leading to
efficiency and thermal improvements.
High V
OUT
Charge Pump Topology
The LT3579 can be used in a charge-pump topology (refer
to Figure 16), multiplying the output of an inductive boost
converter. The master switch (SW1) can be used to drive
the inductive boost converter, while the slave switch (SW2)
can be used to drive one or more charge pump stages. This
topology is useful for high voltage applications including
VFD Bias Supplies.
Single Inductor Inverting Topology
If there is a need to use just 1 inductor to generate a
negative output voltage whose magnitude is greater than
V
IN
, the Single Inductor Inverting topology (shown in
Figure 15) can be used. Since the master and slave switches
are isolated by an external Schottky diode, the current spike
through C1 will flow through the slave switch, thereby
preventing the current comparator (A4 in Block Diagram)
from falsely tripping. Output disconnect is inherently built
into the single inductor topology
.
HOT PLUG
The high inrush current associated with hot-plugging V
IN
can be largely rejected with the use of an external PMOS. A
simple hot-plug controller can be designed by connecting
an external PMOS in series with V
IN
, with the gate of the
PMOS being driven by the GATE pin of the LT3579. Since
the GATE pin pull-down current is linearly proportional to
the SS voltage, and the SS charge up time is relatively slow,
the GATE pin pull-down current will increase gradually,
thereby turning on the external PMOS slowly. Controlled
in this manner, the PMOS acts as an input current limiter
when V
IN
hot-plugs or ramps up sharply.
Likewise, when the PMOS is connected in series with the
output, inrush currents into the output capacitor can be
limited during a hot-plug event. To illustrate this, the circuit
in Figure 6 was re-configured by adding a large 1500µF
capacitor to the output. An 18Ω resistive load was used
and a 2.2µF capacitor was placed on SS. Figure 14 shows
the result of hot-plugging this re-configured circuit. The
inductor current is well behaved and V
OUT
comes up once
V
IN
settles out.