Datasheet

LT3579/LT3579-1
13
35791fa
For more information www.linear.com/LT3579
APPLICATIONS INFORMATION
Figure 6. Boost Converter – The Component Values Given Are
Typical Values for a 1MHz, 5V to 12V Boost
BOOST CONVERTER COMPONENT SELECTION
OPTIONAL
V
IN
5V
C
IN
22µF
R
T
86.6k
C
OUT1
10µF
R
GATE
6.3k
R
C
8k
C
C
2.2nF
C
F
47pF
C
SS
0.1µF
R
FB
130k
V
OUT
12V
1.7A
V
IN
C
OUT
10µF
L1
2.2µH
D1
30V, 4A
SW1 SW2
GATE
V
IN
RT
V
C
FAULT
SHDN
FB
SSGNDSYNC
CLKOUT
LT3579
35791 F06
100k
200k
M
1
The LT3579 can be configured as a Boost converter as in
Figure 6. This topology allows for positive output voltages
that are higher than the input voltage. An external PMOS
(optional) driven by the GATE pin of the LT3579 can achieve
input or output disconnect during a FAULT event. A single
feedback resistor sets the output voltage. For output
voltages higher than 40V, see the Charge Pump topology
in the Charge Pump Aided Regulators section.
Table 1 is a step-by-step set of equations to calculate
component values for the LT3579 when operating as a
Boost converter. Input parameters are input and output
voltage, and switching frequency (V
IN
, V
OUT
and f
OSC
respectively). Refer to the Appendix for further information
on the design equations presented in Table 1.
Variable Definitions:
V
IN
= Input Voltage
V
OUT
= Output Voltage
DC = Power Switch Duty Cycle
f
OSC
= Switching Frequency
I
OUT
= Maximum Output Current
I
RIPPLE
= Inductor Ripple Current
R
DSON_PMOS
= R
DSON
of External PMOS (set to 0 if not
using PMOS)
Table 1. Boost Design Equations
PARAMETERS/EQUATIONS
Step 1:
Inputs
Pick V
IN
, V
OUT
, and f
OSC
to calculate equations below.
Step 2:
DC
DC ≅
V
OUT
– V
IN
+ 0.5V
V
OUT
+ 0.5V – 0.27V
Step 3:
L1
L
TYP
=
V
IN
– 0.27V
( )
• DC
f
OSC
• 1.8A
L
MIN
=
V
IN
– 0.27V
( )
• 2 • DC – 1
( )
4A • f
OSC
• 1– DC
( )
L
MAX
=
V
IN
– 0.27V
( )
• DC
f
OSC
• 0.5A
(1)
(2)
(3)
• Solve equations 1, 2, and 3 for a range of L1 values.
• The minimum of the L1 value range is the higher of L
TYP
and L
MIN
.
• The maximum of the L1 value range is L
MAX
.
Step 4:
I
RIPPLE
I
RIPPLE
=
V
IN
– 0.27V
( )
•
DC
f
OSC
• L1
Step 5:
I
OUT
I
OUT
= 6A –
I
RIPPLE
2






• 1– DC
( )
Step 6:
D1
V
R
> V
OUT
;I
AVG
> I
OUT
Step 7:
C
OUT,
C
OUT1
C
OUT
=C
OUT1
=
I
OUT
•
DC
f
OSC
• 0.01•V
OUT
–0.5•I
OUT
•R
DSON_PMOS
( )
Step 8:
C
IN
C
IN
= C
PWR
+ C
VIN
C
IN
=
I
RIPPLE
8 • f
OSC
•0.005• V
IN
+
6A •DC
40 • f
OSC
• 0.005 • V
IN
Step 9:
R
FB
R
FB
=
V
OUT
– 1.215V
83.3µA
Step 10:
R
T
R
T
=
87.6
f
OSC
–1; f
OSC
inMHz andR
T
in kΩ
Step 11:
PMOS
Only needed for input or output disconnect. See PMOS
Selection in the Appendix for information on sizing the PMOS
and the biasing resistor, R
GATE
.
Note: The maximum design target for peak switch current is 6A and
is used in this table. The final values for C
OUT
and C
IN
may deviate
from the above equations in order to obtain desired load transient
performance for a particular application.