Datasheet

LT3519/LT3519-1/LT3519-2
12
3519fa
APPLICATIONS INFORMATION
Open LED Detection
The LT3519/LT3519-1/LT3519-2 provide an open-collector
status pin, OPENLED, that pulls low when the FB pin is
within ~60mV of its 1.22V regulated voltage. If the open
LED clamp voltage is programmed correctly using the FB
pin, then the FB pin should never exceed 1.1V when LEDs
are connected, therefore, the only way for the FB pin to
be within 60mV of the 1.22V regulation voltage is for an
open LED event to have occurred.
Inrush Current
The LT3519/LT3519-1/LT3519-2 have a built-in Schottky
diode for a boost converter. When supply voltage is ap-
plied to V
IN
pin, the voltage difference between V
IN
and
V
OUT
generates inrush current fl owing from input through
the inductor and the Schottky diode to charge the output
capacitor. The selection of inductor and capacitor value
should ensure the peak of the inrush current to below
10A. In addition, the LT3519/LT3519-1/LT3519-2 turn-on
should be delayed until the inrush current is less than the
maximum current limit. If the peak of the inrush current
is more than 10A, an external Schottky diode should be
used to bypass both the inductor and internal Schottky.
The recommended Schottky diodes for hot plug are shown
on Table 3.
Table 3. Schottky Diodes Recommended for Hot Plug
VENDOR PART NUMBER V
R
(V) I
AVE
(A)
Diodes, Inc DFLS160 60 1
Zetex ZLLS10000TA 40 1
International Rectifi er 10MQ060N 60 1.5
Board Layout
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To prevent electromagnetic interference (EMI) problems,
proper layout of high frequency switching paths (see
Figure 4) is essential. Minimize the length and area of all
traces connected to the switching node pin (SW). Keep the
sense voltage pins (ISP and ISN) away from the switching
node. The bypass capacitor on the V
IN
supply to the LT3519
should be placed as close as possible to the V
IN
pin and
GND. Likewise, place C
OUT
next to the CATHODE pin. Do
not extensively route high impedance signals such as FB
and CTRL, as they may pick up switching noise. Figure 5
shows the recommended component placement.
+
LOAD
V
OUT
3519 F04
V
IN
D1
SW
L1
Figure 4. High Frequency Path
GND
OPENLED
PWM
SHDN/UVLO
V
IN
SW
ANODE
GND
GND
V
REF
CTRL
FB
ISN
ISP
CATHODE
GND
GND
V
IN
V
OUT
R
S
C
OUT
C
IN
L1
3519 F05
Figure 5. Suggested Layout