Datasheet

LT3511
15
3511fc
Minimum Load Requirement
The LT3511 recovers output voltage information using the
flyback pulse. The flyback pulse occurs once the switch
turns off and the secondary winding conducts current. In
order to regulate the output voltage, the LT3511 needs to
sample the flyback pulse. The LT3511 delivers a minimum
amount of energy even during light load conditions to
ensure accurate output voltage information. The minimum
delivery of energy creates a minimum load requirement
of 10mA to 15mA depending on the specific application.
Verify minimum load requirements for each application.
A Zener diode with a Zener breakdown of 20% higher
than the output voltage can serve as a minimum load if
pre-loading is not acceptable. For a 5V output, use a 6V
Zener with cathode connected to the output.
BIAS Pin Considerations
The BIAS pin powers the internal circuitry of the LT3511.
Three unique configurations exist for regulation of the BIAS
pin. In the first configuration, the internal LDO drives the
BIAS pin internally from the V
IN
supply. In the second setup,
the V
IN
supply directly drives the BIAS pin through a direct
connection bypassing the internal LDO. This configuration
will allow the part to operate down to 4.5V and up to 15V.
In the third configuration, an external supply or third wind-
ing drives the BIAS pin. Use this option when a voltage
supply exists lower than the input supply. Drive the BIAS
pin with a voltage supply higher than 3.3V to disable the
internal LDO. The lower voltage supply provides a more
efficient source of power for internal circuitry.
Overdriving the BIAS Pin with a Third Winding
The LT3511 provides excellent output voltage regulation
without the need for an opto-coupler, or third winding, but
for some applications with higher input voltages (>20V),
an additional winding (often called a third winding) im-
proves overall system efficiency. Design the third winding
to output a voltage between 3.3V and 12V. For a typical
48V
IN
application, overdriving the BIAS pin improves ef-
ficiency 4% to 5%.
LT3511
3.3V < BIAS < 20V
6V TO 100V
BIAS
V
IN
3511 F08
EXTERNAL
SUPPLY
LDO
LT3511
3V
6V TO 100V
BIAS
V
IN
LDO
LT3511
4.5V TO 15V
BIAS
V
IN
OPTIONAL
LDO
Figure 8. BIAS Pin Configurations
Loop Compensation
An external resistor-capacitor network compensates the
LT3511 on the VC pin. Typical compensation values are in
the range of R
C
= 20k and C
C
= 2.2nF (see the numerous
schematics in the Typical Applications section for other pos-
sible values). Proper choice of both R
C
and C
C
is important
to achieve stability and acceptable transient response. For
example, vulnerability to high frequency noise and jitter
result when R
C
is too large. On the other hand, if R
C
is
too small, transient performance suffers. The inverse is
true with respect to the value of C
C
. Transient response
suffers with too large of a C
C
, and instability results from
too small a C
C
. The specific value for R
C
and C
C
will vary
based on the application and transformer choice. Verify
specific choices with board level evaluation and transient
response performance.
APPLICATIONS INFORMATION