Datasheet

LT3507A
7
3507af
PIN FUNCTIONS
BIAS: The BIAS pin supplies the current to the LT3507A’s
internal regulator. This pin should be tied to the lowest
available voltage source above 3V (either V
IN
, V
OUT
or any
other available supply). The LDO pass transistor’s base
current is supplied from the BIAS pin if it is at least 0.8V
above the LDO DRIVE output.
BOOST1, BOOST2, BOOST3: The BOOST pins are used
to provide drive voltages, higher than the input voltage,
to the internal bipolar NPN power switches. These pins
must be tied through a diode from V
OUT
, V
IN
or another
supply greater than 2.5V.
DRIVE: The DRIVE pin provides the base drive for an
external NPN transistor used for the LDO regulator.
FB1, FB2, FB3: The FB pins are the negative inputs of the
error amplifiers. The LT3507A regulates each feedback pin
to the lesser of 0.8V or the TRK/SS pin voltage. Connect
the feedback resistor divider taps to these pins.
FB4: The FB4 pin is the negative input to the LDO error
amplifier. It is regulated to 0.8V through the LDO feedback
resistor divider.
GND: Ground. The underside exposed pad metal of the
package provides both electrical contact to ground and
good thermal contact to the printed circuit board. The
exposed pad must be soldered to a grounded pad on the
circuit board for proper operation.
OVLO: The LT3507A goes into overvoltage shutdown when
this pin goes above 1.2V. If unused, the OVLO pin should
be tied to GND.
PGOOD1, PGOOD2, PGOOD3: The PGOOD pins are the
open-collector outputs of an internal comparator. PGOOD
remains low until the FB pin is within 10% of the final
regulation voltage. As well as indicating output regulation,
the PGOOD pins can sequence the switching regulators.
These pins must be left unconnected if unused. The PGOOD
outputs are valid when V
IN
is greater than 3.5V and any of
the RUN pins are high. They are not valid when all RUN
pins are low.
RT/SYNC: The RT/SYNC pin requires a resistor to ground
or a clock signal to set the operating frequency of the
LT3507A.
RUN1, RUN2, RUN3: The RUN pins are used to shut down
the individual switching regulators. When all three RUN
pins are low, the LT3507A shuts down and draws less
than 1µA from V
IN1
.
SW1, SW2, SW3: The SW pins are the outputs of the
internal power switches. Connect these pins to the induc-
tors and switching diodes.
TRK/SS1, TRK/SS2, TRK/SS3, TRK/SS4: The TRK/SS pins
allow a regulator to track the output of another regulator.
When the TRK/SS pin is below 0.8V, the FB pin regulates
to the TRK/SS voltage. This pin souces 1.25µA and can
be used as a soft-start by connecting a capacitor from
TRK/SS to ground. The TRK/SS pins should be left open
if neither feature is used.
UVLO: The LT3507A goes into undervoltage shutdown
when this pin drops below 1.2V. If unused, the UVLO pin
should be tied to V
INSW
.
V
C1
, V
C2
, V
C3
: The V
C
pins are the outputs of the internal
error amps. The voltages on these pins control the peak
switch currents. These pins are normally used to com-
pensate the control loops. Each switching regulator can
be shut down by pulling its respective V
C
pin to ground
with an NMOS or NPN transistor.
V
IN1
: The V
IN1
pins supply power to the internal switch of
the 2.7A regulator and to the LT3507A’s internal reference
and start-up circuitry. These pins must be locally bypassed.
V
IN2
/V
IN3
: The V
IN2
and V
IN3
pins supply power to the
internal switches of the 1.8A converters. These pins must
be locally bypassed.
V
INSW
: The V
INSW
pin is a switched V
IN1
for the user pro-
grammable undervoltage and overvoltage detection. It is
connected to V
IN1
when any of the RUN pins are pulled high,
and high impedance when all RUN pins are low or open.