Datasheet
LT3505
8
3505fc
BLOCK DIAGRAM
7
Σ
R
DRIVER
Q1
S
OSC
SLOPE
COMP
FREQUENCY
FOLDBACK
INT REG
AND
UVLO
V
C
g
m
780mV
3505 BD
5
3
4
Q
Q
1
2
BOOST
SW
FB
R2
R1
V
OUT
L1
D2
C3
C1
D1
V
IN
C2
V
IN
ON OFF
GND
6
R
T
8
V
C
C4
R3
SHDN
OPERATION
(Refer to Block Diagram)
The LT3505 is a constant frequency, current mode step-
down regulator. A resistor-programmed oscillator enables
an RS fl ip-fl op, turning on the internal 1.4A power switch
Q1. An amplifi er and comparator monitor the current
fl owing between the V
IN
and SW pins, turning the switch
off when this current reaches a level determined by the
voltage at the V
C
pin. An error amplifi er measures the
output voltage through an external resistor divider tied to
the FB pin and servos the V
C
node. If the error amplifi er’s
output increases, more current is delivered to the output;
if it decreases, less current is delivered. An active clamp
(not shown) on the V
C
node provides current limit. The
V
C
node is also clamped to the voltage on the SHDN pin;
soft-start is implemented by generating a voltage ramp at
the SHDN pin using an external resistor and capacitor.
An internal regulator provides power to the control circuitry.
This regulator includes an undervoltage lockout to prevent
switching when V
IN
is less than ~3.4V. The SHDN pin is
used to place the LT3505 in shutdown, disconnecting the
output and reducing the input current to less than 2µA.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate
the internal bipolar NPN power switch for effi cient opera-
tion.
When the FB pin is low, the voltage at the R
T
pin decreases
to reduce the oscillator frequency. This frequency foldback
helps to control the output current during start-up and
overload.
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