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LT3501

3501fd

Typical applicaTion

FeaTures

applicaTions

DescripTion

Monolithic Dual Tracking

3A Step-Down Switching

Regulator

The LT

3501 is a dual-current mode PWM step-down

DC/DC converter with two internal 3.5A switches. Inde-

pendent input voltage, feedback, soft-start and power

good pins for each channel simplify complex power

supply tracking/sequencing requirements.

Both converters are synchronized to either a common

external clock input or a resistor programmable ﬁxed

250kHz to 1.5MHz internal oscillator. At all frequencies, a

180° phase relationship between channels is maintained,

reducing voltage ripple and component size. Programmable

frequency allows for optimization between efﬁciency and

external component size.

Minimum input-to-output voltage ratios are improved

by allowing the switch to stay on through multiple clock

cycles, only switching off when the boost capacitor needs

recharging, resulting in ~95% maximum duty cycle.

Each output can be independently disabled using its own

soft-start pin, or by using the SHDN pin the entire part can

be placed in a low quiescent current shutdown mode.

The LT3501 is available in a 20-lead TSSOP package with

exposed leadframe for low thermal resistance.

DSP Power Supplies

Disc Drives

DSL/Cable Modems

Wall Transformer Regulation

Distributed Power Regulation

Wide Input Range: 3.1V to 25V

Two Switching Regulators with 3A Output Capability

Independent Supply to Each Regulator

Adjustable/Synchronizable Fixed Frequency

Operation from 250kHz to 1.5MHz

Antiphase Switching

Outputs Can be Paralleled

Independent, Sequential, Ratiometric or Absolute

Tracking Between Outputs

Independent Soft-Start and Power Good Pins

Enhanced Short-Circuit Protection

Low Dropout: 95% Maximum Duty Cycle

Low Shutdown Current: <10µA

20-Lead TSSOP Package with Exposed Leadframe

3.3V and 1.8V Dual 3A Step-Down Converter with Output Tracking

SHDN

4.7µF

47µF

24.9k

61.9k

8.06k

470pF

10pF 47pF

40.2k

4.7µH

3.3µH

OUT1

3.3V, 3A

OUT2

1.8V, 3A

, 12V

0.47µF

B360A

100µF

0.47µF

PMEG4005

IN1

IN2

LT3501

GND

BST1

SW1

IND1

OUT1

PG1

FB1

SS/TRACK1

/SYNC

BST2

SW2

IND2

OUT2

PG2

FB2

SS/TRACK2

10k

8.06k

3501 TA01a

0.1µF

470pF

40.2k

LOAD CURRENT (A)

EFFICIENCY (%)

0.5

1.5 2

3501 TA01b

2.5

100

OUT1

= 5V

OUT1

= 3.3V

OUT1

= 2.5V

OUT1

= 1.8V

= 12V

OUT2

= 0A

FREQUENCY = 500kHz

Efﬁciency

L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks

and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners.

Summary of content (30 pages)

PAGE 1
LT3501 Monolithic Dual Tracking 3A Step-Down Switching Regulator Description Features n n n n n n n n n n n n Wide Input Range: 3.1V to 25V Two Switching Regulators with 3A Output Capability Independent Supply to Each Regulator Adjustable/Synchronizable Fixed Frequency Operation from 250kHz to 1.
PAGE 2
LT3501 Absolute Maximum Ratings (Note 1) Pin Configuration VIN1/2, SHDN, PG1/2....................................... 25V/–0.3V SW1/2.....................................................................VIN1/2 BST1/2............................................................ 35V/–0.3V BST1/2 Pins Above SW1/2.........................................25V IND1/2 .......................................................................±5A VOUT1/2.........................................................
PAGE 3
LT3501 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VVIN1/2 = 15V, VBST1/2 = open, VRT/SYNC = 2V, VVOUT1/2 = open, unless otherwise specified. PARAMETER CONDITIONS Feedback Bias Current Ch 1/Ch 2 VFB1/2 = 0.
PAGE 4
LT3501 Electrical Characteristics Note 4: An internal power-on reset (POR) latch is set on the positive transition of the SHDN pin through its threshold. The output of the latch activates current sources on each SS pin which typically sink 1.5mA, discharging the SS capacitor. The latch is reset when both SS pins are driven below the soft-start POR threshold or the SHDN pin is taken below its threshold.
PAGE 5
LT3501 Typical Performance Characteristics Soft-Start to Feedback Offset Voltage vs Temperature VC Switching Threshold Voltage vs Temperature Power Good Threshold Voltage vs Temperature 800 1000 4 780 3 900 760 0 –1 740 800 VOUT = 5V VOLTAGE (V) 1 VOLTAGE (V) VOLTAGE (mV) 2 700 VOUT = 0V 600 700 640 500 620 –4 –50 –25 75 50 25 TEMPERATURE (°C) 0 100 400 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 100 600 –50 125 50 25 0 75 TEMPERATURE (°C) –25 100 3501 G09 3501 G08 Switchi
PAGE 6
LT3501 Typical Performance Characteristics External Sync Duty Cycle Range vs External Sync Frequency 1600 90 FREQUENCY (kHz) DUTY CYCLE (%) 50 40 MINIMUM CLOCK DUTY CYCLE 20 10 0 250 500 185 400 1200 180 350 1000 175 800 170 1000 1250 750 FREQUENCY (kHz) 1500 FREQUENCY PHASE 160 100 200 155 50 100 150 0 40 60 80 100 RESISTANCE (kΩ) 120 1.5 1.0 0.5 100 100 95 90 90 80 85 70 80 75 70 40 30 20 55 10 3501 G21 100 0 125 6.0 VOUT = 2.
PAGE 7
LT3501 Typical Performance Characteristics 1500 LOAD = 1A 1250 VOUT = 5V 4 3 FREQUENCY (kHz) OUTPUT VOLTAGE (V) 5 VOUT = 3.3V 2 0 2 2.5 3 4.5 5 3.5 4 INPUT VOLTAGE (V) 5.5 1000 6 L = 4.7µH 3501 G27 9 11 13 15 17 19 21 INPUT VOLTAGE (V) L = 3.3µH 1000 L = 4.7µH 750 L = 6.8µH 500 L = 6.8µH 7 VOUT = 5V IRIPPLE = 1A 1250 L = 3.3µH 750 250 L = 2.2µH L = 2.2µH 500 FREQUENCY 1.5MHz 250kHz 1 1500 VOUT = 3.
PAGE 8
LT3501 Pin Functions VIN1 (Pin 1): The VIN1 pin powers the internal control circuitry for both channels and is monitored by the undervoltage lockout comparator. The VIN1 pin is also connected to the collector of channel 1’s on-chip power NPN switch. The VIN1 pin has high dI/dt edges and must be decoupled to ground close to the pin of the device. SW1/SW2 (Pins 2, 9): The SW pin is the emitter of the onchip power NPN. At switch-off, the inductor will drive this pin below ground with a high dV/dt.
PAGE 9
LT3501 Pin Functions the clock signal is detected, with switch 1 in phase with the synchronization signal. Each rising clock edge initiates an oscillator ramp reset. A gain control loop servos the oscillator charging current to maintain a constant oscillator amplitude. Hence, the slope compensation and channel phase relationship remain unchanged. If the clock signal is removed, the oscillator reverts to resistor mode and reapplies the 0.
PAGE 10
LT3501 Block Diagram RT/SYNC R3 VIN1 7µA SHDN + 1.28V + – C CLK1 OSCILLATOR AND CLK2 AGC INTERNAL REGULATOR AND REFERENCE 3µA VIN ONE CHANNEL DROPOUT ENHANCEMENT SLOPE COMPENSATION Σ – + S R BST C3 PRE DRIVER CIRCUITRY Q SW L1 SHUTDOWN COMPARATOR IND POR UNDERVOLTAGE TSD + – + D VOUT 0.8V C LOWEST VOLTAGE S R Q + – + – SOFT-START RESET COMPARATOR + SS CLAMP R1 R2 POWER GOOD COMPARATOR 80mV FB VC CLAMP 3.25mA GND D – + + PGOOD 0.
PAGE 11
LT3501 Block Diagram will be generated at the incoming frequency on the rising edge of the synchronization pulse with switch 1 in phase with the synchronization signal. In addition, the internal slope compensation will be automatically adjusted to prevent subharmonic oscillation during synchronization. The two regulators are constant-frequency, current mode step-down converters.
PAGE 12
LT3501 Applications Information The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the 1% resistors according to: 1400 V  R1= R2 •  OUT – 1  0.8V  FREQUENCY (kHz) 1600 190 1200 180 1000 175 R2 should be 10k or less to avoid bias current errors. Reference designators refer to the Block Diagram in Figure 1. 800 The switching frequency is typically set as high as possible to reduce overall solution size.
PAGE 13
LT3501 Applications Information duty cycle. The duty cycle is the fraction of time that the internal switch is on during a clock cycle. Unlike most 6.0 5.5 DcMAX = 1 1+ B where B is 3A divided by the typical boost current from the Electrical Characteristics table. This leads to a minimum input voltage of: V +V VIN(MIN) = OUT D – VD + VSW DcMAX where VSW is the voltage drop of the internal switch. Figure 3 shows a typical graph of minimum input voltage vs load current for the 3.3V and 1.
PAGE 14
LT3501 Applications Information and its saturation current should be about 30% higher. To keep efficiency high, the series resistance (DCR) should be less than 0.05Ω. For applications with a duty cycle of about 50%, the inductor value should be chosen to obtain an inductor ripple current less than 40% of peak switch current. Of course, such a simple design guide will not always result in the optimum inductor for your application.
PAGE 15
LT3501 Applications Information may result in discontinuous mode operation, which is okay, but further reduces maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology Application Note 44. Finally, for duty cycles greater than 50% (VOUT/VIN > 0.5), there is a minimum inductance required to avoid subharmonic oscillations. See Application Note 19 for more information. Input Capacitor Selection Bypass the inputs of the LT3501 circuit with a 4.
PAGE 16
LT3501 Applications Information either clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor. For details, see Application Note 88. The RMS content of this ripple is very low, and the RMS current rating of the output capacitor is usually not of concern.
PAGE 17
LT3501 Applications Information Table 2 VENDOR TYPE SERIES Taiyo Yuden Ceramic X5R, X7R AVX Ceramic X5R, X7R Tantalum Kemet Tantalum TA Organic AL Organic T491, T494, T495 T520 A700 Sanyo TA/AL Organic POSCAP Panasonic AL Organic SP CAP TDK Ceramic X5R, X7R Catch Diode The diode D1 conducts current only during switch off-time. Use a Schottky diode to limit forward-voltage drop to increase efficiency.
PAGE 18
LT3501 Applications Information D2 VIN VIN BST C3 D2 VIN SW VIN LT3501 GND (5b) D2 VX > VIN + 3V VIN BST C3 VIN SW LT3501 VIN BST SW LT3501 IND VOUT VBST – VSW = VX VBST(MAX) = VIN + VX VX(MIN) = 3V VOUT < 3V GND VBST – VSW = VIN VBST(MAX) = 2 • VIN D2 VIN SW IND VOUT VOUT (5a) VX = LOWEST VIN OR VOUT > 3V C3 LT3501 IND VOUT VBST – VSW = VOUT VBST(MAX) = VIN + VOUT BST IND VOUT VOUT < 3V GND VBST – VSW = VX VBST(MAX) = VX VX(MIN) = VIN + 3V (5c) VOUT < 3V GND 3501 F05
PAGE 19
LT3501 Applications Information LT3501 CURRENT MODE POWER STAGE gm = 3mho SW gm = 275µmho 3.6M RC CF + – VC ERROR AMP OUTPUT R1 CPL ESR FB C1 + CC 0.8V R2 C1 CERAMIC TANTALUM OR POLYMER 3501 F06 Figure 6. Model for Loop Response the output capacitor integrates this current, and that the capacitor on the VC pin (CC) integrates the error amplifier output current, resulting in two poles in the loop.
PAGE 20
LT3501 Applications Information If the synchronization signal powers up in a high impedance state (Hi-Z), connect a resistor from the RT/SYNC pin to ground. The equivalent resistance seen from the RT/SYNC pin to ground will set the start-up frequency. If the synchronization signal changes between high and low impedance states during power-up (VOL, Hi-Z), connect the synchronization circuitry to the LT3501 as shown in the Typical Applications section.
PAGE 21
LT3501 Applications Information At power-up, a reset signal sets the soft-start latch and discharges both SS pins to approximately 0V to ensure proper start-up. When both SS pins are fully discharged the latch is reset and the internal 3.25µA current source starts to charge the SS pin. threshold is exceeded. The PG pin is active (sink capability is reduced in shutdown and undervoltage lockout mode) as long as the VIN1 pin voltage exceeds 1V.
PAGE 22
LT3501 Applications Information Independent Start-Up Ratiometric Start-Up Absolute Start-Up VOUT1 0.5V/DIV VOUT1 0.5V/DIV PG1 PG1 PG1 VOUT2 0.5V/DIV VOUT2 0.5V/DIV PG2 SS1 3.3V VOUT1 0.1µF LT3501 SS1 10ms/DIV 3.3V VOUT1 SS1 0.22µF LT3501 VOUT1 1.8V PG1 1.8V VOUT2 SS2 PG2 3.3V LT3501 PG1 VOUT2 SS2 PG2 10ms/DIV PG1 0.22µF VOUT2 0.5V/DIV PG2 5ms/DIV 0.1µF VOUT1 0.5V/DIV SS2 VOUT2 PG2 1.8V PG2 R1 13.7k (9a) R2 8.
PAGE 23
LT3501 Applications Information VIN 6V TO 24V 4.7µF PMEG4005 VIN2 VIN1 3.3µH 0.47µF PMEG4005 VOUT1 5V SHDN FSET BST1 BST2 SW1 SW2 B360A 47µF IND2 VOUT2 42.3k 100k PG1 FB1 8.06k 470pF 10pF 1µH 0.47µF B360A LT3501 IND1 VOUT1 26.7k 40.2k 47µF ×2 4k PG2 FB2 VC1 VC2 SS/TRACK1 SS/TRACK2 GND 0.1µF VOUT2 1.2V 8.06k 470pF 0.1µF 32.4k 10pF 3501 F10 Figure 10. 5V and 1.2V 2-Stage Step-Down Converter with Output Sequencing inductor size by allowing an increase in frequency.
PAGE 24
LT3501 Applications Information VIN LT3501 SW VIN LT3501 SW VIN LT3501 SW GND GND GND (11a) (11b) (11c) Figure 11. Subtracting the Current When the Switch Is On (11a) from the Current When the Switch is Off (11b) Reveals the Path of the High Frequency Switching Current (11c). Keep This Loop Small. The Voltage on the SW and BST Traces Will Also Be Switched; Keep These Traces as Short as Possible.
PAGE 25
LT3501 Applications Information Place additional vias near the catch diodes. Adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can further reduce thermal resistance. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to qJA = 45°C/W.
PAGE 26
LT3501 Typical Applications 5V and 2.5V with Absolute Tracking VIN 12V 4.7µF VIN1 SHDN 3.3µH 0.47µF PMEG4005 VOUT1 5V BST1 BST2 SW1 SW2 B360A 47µF 26.7k 100k 10pF PMEG4005 B360A IND2 VOUT2 IND1 VOUT1 42.3k 2.2µH 0.47µF LT3501 100k PG1 PG2 FB1 FB2 VC1 VC2 SS/TRACK1 SS/TRACK2 GND 470pF 8.06k VIN2 RT/SYNC 47µF 16.9k VOUT2 2.5V 470pF 40.2k 40.2k 10pF 8.06k 0.1µF 16.9k 3501 TA02 7.68k 1.25MHz Single 3.3V/6A Low Ripple Output VIN 6V TO 25V 4.7µF VIN2 VIN1 1.5µH 0.
PAGE 27
LT3501 Typical Applications 1.25MHz Single 3.3V/6A Low Ripple Output VIN 4.5V TO 6V 4.7µF 1µF* VIN2 VIN1 PMEG4005* 1.5µH PMEG4005 VOUT1 3.3V 6A 47µF ×2 0.47µF SHDN RT/SYNC BST1 BST2 SW1 SW2 B360A 0.47µF 1.5µH B360A LT3501 IND1 VOUT1 24.9k 20.5k PMEG4005* PMEG4005 IND2 VOUT2 100k PG1 FB1 PG2 FB2 VC1 VC2 SS/TRACK1 SS/TRACK2 GND 8.06k 1000pF 22pF 17.8k 0.1µF 3501 TA03 *ADDITIONAL COMPONENTS ADDED TO SHOW THE BOOST VOLTAGE WHEN VIN <6V.
PAGE 28
LT3501 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev I) Exposed Pad Variation CB 6.40 – 6.60* (.252 – .260) 3.86 (.152) 3.86 (.152) 20 1918 17 16 15 14 13 12 11 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.
PAGE 29
LT3501 Revision History (Revision history begins at Rev D) REV DATE DESCRIPTION D 6/12 Part Marking clarification PAGE NUMBER 2 Solder pad clarification 28 3501fd Information furnished by Linear Technology corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PAGE 30
LT3501 Related Parts PART NUMBER DESCRIPTION COMMENTS LT1766 60V, 1.2A (IOUT), 200kHz High Efficiency Step-Down DC/DC Converter VIN: 5.5V to 60V, VOUT(MIN) = 1.20V, IQ = 2.5mA, ISD = 25µA, 16-Lead TSSOPE Package LT1933 500mA (IOUT), 500kHz Step-Down Switching Regulator in SOT-23 VIN: 3.6V to 36V, VOUT(MIN) = 1.2V, IQ = 1.6mA, ISD < 1µA, ThinSOT™ Package LT1936 36V, 1.4A (IOUT), 500kHz High Efficiency Step-Down DC/DC Converter VIN: 3.6V to 36V, VOUT(MIN) = 1.2V, IQ = 1.