Datasheet

LT3494/LT3494A
10
3494fb
TYPICAL APPLICATIONS
Figure 5. One Li-Ion Cell Input Boost Converter with the LT3494
APPLICATIONS INFORMATION
the CAP pin will improve effi ciency and lower the stress
placed on the internal Schottky diode.
Board Layout Considerations
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
To maximize effi ciency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switching path is essential. The voltage signal of the SW pin
has sharp rising and falling edges. Minimize the length and
area of all traces connected to the SW pin and always use
a ground plane under the switching regulator to minimize
interplane coupling. In addition, the FB connection for
the feedback resistor R1 should be tied directly from the
Vout pin to the FB pin and be kept as short as possible,
ensuring a clean, noise-free connection. Recommended
component placement is shown in Figure 4.
SW
GND
V
CC
CTRL
CAP
V
OUT
FB
SHDN
GND
GND
CTRL
VIAS TO GROUND PLANE REQUIRED
TO IMPROVE THERMAL PERFORMANCE
SHDN
3494 F04
Figure 4. Recommended Layout
SW CAP
V
CC
SHDN
CTRL
7
6
2
3
5
4
V
OUT
FB
GND
TURN ON/OFF
V
OUT
DIMMING
R1
3494 F05
LT3494
C2
4.7μF
L1
15μH
C1
0.22μF
C3
2.2μF
C1, C2: X5R OR X7R WITH SUFFICIENT VOLTAGE RATING
C3: MURATA GRM31MR71E225K
L1: MURATA LQH32CN150K53
81
V
IN
3V TO 4.2V
V
OUT
LOAD CURRENT (mA)
0.1
60
EFFICIENCY (%)
POWER LOSS (mW)
70
80
90
1 10 100
3494 TA01c
50
40
30
20
160
200
240
280
120
80
40
0
V
IN
= 3.6V
LOAD FROM
CAPACITOR
LOAD FROM
V
OUT
3.6V to 16V Effi ciency
V
OUT
R1 VALUE REQUIRED
(MΩ)
MAXIMUM OUTPUT CURRENT AT
3V INPUT (mA)
25 3.57 8.6
24 3.40 9.3
23 3.24 10.0
22 3.09 10.6
21 2.94 11.3
20 2.80 12.1
19 2.67 12.9
18 2.49 13.6
17 2.37 14.8
16 2.21 16.0
15 2.05 17.2