Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - DC/DC voltage regulator Boost, Switched-capacitor voltage converter, Cuk DFN 10

LT3487

3487f

Boost and Inverting

Switching Regulator

for CCD Bias

■

CCD Bias

■

TFT LCD Bias

■

OLED Bias

■

±Rail Generation for Op Amps

■

Generates 15V at 45mA, –8V at 90mA from a

Li-Ion Cell

■

Output Disconnect

■

Sequencing: Positive Output Reaches Regulation

Before Negative Channel Begins Switching

■

Internal Schottky Diodes

■

2MHz Constant Switching Frequency

■

Requires Only One Resistor per Channel to Set

Output Voltages

■

Range: 2.3V to 16V

■

Output Voltage Up to 28V

■

Short-Circuit Robust

■

Capacitor Programmable Soft-Start

■

Separate V

BAT

Pin Allows Separate Sources for

Power and Control Circuitry

■

Available in 10-Lead (3mm × 3mm) DFN Package

APPLICATIO S

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

The LT

3487 dual channel switching regulator generates

positive and negative outputs for biasing CCD imagers.

The device delivers up to –8V at 90mA and 15V at 45mA

from a lithium-ion cell, providing bias for many popular

CCD imagers. The boost regulator incorporates output

disconnect technology to eliminate the DC current path

from V

to the output load that is present in standard

boost conﬁ gurations. The 2MHz switching frequency

allows CCD solutions using tiny, low proﬁ le capacitors

and inductors and generates low noise outputs that are

easy to ﬁ lter. Schottky diodes are internal and the output

voltages are set with one resistor per channel, reducing

the external component count.

Intelligent soft-start allows sequential soft-start of the two

channels with a single capacitor. The soft-start is sequenced

such that the output ramp of the negative channel begins

after the ramp of the positive channel. Internal sequencing

circuitry also disables the negative channel until the positive

channel has reached 87% of its ﬁ nal value, ensuring that

the sum of the two outputs is always positive.

The LT3487 is available in a 10-pin 3mm × 3mm DFN

package.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

SWN

15µH10µH

CAP

549k

FBP

POS

BAT

LT3487

GND

SWP

15µH

324k

47pF

FBN

RUN/SSRUN/SS

NEG

–8V

90mA

100nF

4.7µF

3487 TA01a

100nF

POS

15V

45mA

1µF

2.2µF

22µF

3V TO 12V

Conversion Efﬁ ciency

LOAD CURRENT (mA)

EFFICIENCY (%)

100

3487 TA01b

20 40 80

POS CHANNEL AT CAP

NEG CHANNEL

POS CHANNEL

AT V

POS

= 3.6V

Summary of content (16 pages)

PAGE 1
LT3487 Boost and Inverting Switching Regulator for CCD Bias DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT®3487 dual channel switching regulator generates positive and negative outputs for biasing CCD imagers. The device delivers up to –8V at 90mA and 15V at 45mA from a lithium-ion cell, providing bias for many popular CCD imagers.
PAGE 2
LT3487 U W W W ABSOLUTE AXI U RATI GS (Note 1) U W U PACKAGE/ORDER I FOR ATIO VIN Voltage ............................................................... 16V VBAT Voltage ............................................................. 16V SWP, SWN Voltage................................................... 32V CAP, VPOS .................................................................30V DN Voltage ............................................................. –32V RUN/SS Voltage ........................
PAGE 3
LT3487 ELECTRICAL CHARACTERISTICS The ● denotes the speciﬁcations which apply over the full operating temperature range, otherwise speciﬁcations are at TA = 25°C. VIN = 3.6V, VBAT = 3.6V, unless otherwise noted. PARAMETER CONDITIONS Schottky DP Forward Drop ISWP = 400mA MIN 1045 mV Schottky DN Forward Drop ISWN = 600mA 980 mV Disconnect PNP VCE IVPOS = 50mA 205 mV MAX UNITS Disconnect Current Limit VCAP = 15V, VPOS = 0V VCAP – VBAT to Disconnect VBAT = 3.6V, VPOS = 0V, ICAP < 100µA 1.
PAGE 4
LT3487 U W TYPICAL PERFOR A CE CHARACTERISTICS FBN Voltage FBP Bias Current 10.0 FBN Bias Current 26.0 26.0 25.5 25.5 7.5 0 IFBN (µA) 2.5 IFBP (µA) VFBN (mV) 5.0 25.0 25.0 –2.5 24.5 24.5 –5.0 –7.5 –10.0 –50 –25 0 50 75 25 TEMPERATURE (°C) 100 24.
PAGE 5
LT3487 U W TYPICAL PERFOR A CE CHARACTERISTICS Output Disconnect Current Limit 1150 CURRENT LIMITS (mA) 150 125 1100 1050 1000 950 POS CHANNEL 900 –25 75 0 25 50 TEMPERATURE (°C) 100 800 –50 –25 125 800 P0S CHANNEL 600 400 200 850 100 –50 NEG CHANNEL 1000 NEG CHANNEL 175 CURRENT LIMIT (mA) 1200 1200 VCAP = 15V VBAT = 3.
PAGE 6
LT3487 U U U PI FU CTIO S CAP (Pin 1): Disconnect-PNP Emitter and Positive Schottky Cathode. Acts as an intermediate positive (boost) output. Connect boost output capacitor to this pin. VBAT (Pin 3): Battery Voltage. Connect this pin to the supply voltage for the boost inductor. The disconnect drive current is returned to this pin. The disconnect operates until CAP falls to 1.2V above VBAT. RUN/SS (Pin 8): Run/Soft-Start Pin. Connect to an opendrain transistor. The transistor must sink 1.
PAGE 7
LT3487 W BLOCK DIAGRA L1 VBAT CAP 2 R1 9 SWP – FBP 49.2k + A1 – VCP + A2 DP R S VBAT 6 CAP X1 Q Q1 VIN DISCONNECT PNP Q3 C4 VBAT C1 VREF 1.23V VPOS Σ 1.4µA GND RAMP GENERATOR 49.2k + M1 8 RUN RUN/SS – + 1 ANTISAT C5 3 + 10 11 2MHz OSCILLATOR 160mV 1.25V C6 7 C7 R2 FBN VBAT + – A3 – VCN + VNEG L2 A4 SWN R X2 S Q 4 Q2 C2 Σ DN DN RAMP GENERATOR L3 VNEG 5 C3 3487 BD Figure 1.
PAGE 8
LT3487 U W U U APPLICATIO S I FOR ATIO Operation The LT3487 uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram in Figure 1. At the start of each oscillator cycle, the SR latch X1 is set, which turns on the power switch Q1. A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A2.
PAGE 9
LT3487 U U W U APPLICATIO S I FOR ATIO where L is the inductance, r is the resistance of the inductor and C is the output capacitance. For low DCR inductors, which is usually the case for this application, the peak inrush current can be simpliﬁed as follows: Table 2. Recommended Ceramic Capacitor Manufacturers MANUFACTURER Taiyo Yuden Murata Kemet PHONE (408) 573-4150 (814) 237-1431 (408) 986-0424 URL www.t-yuden.com www.murata.com www.kemet.
PAGE 10
LT3487 U U W U APPLICATIO S I FOR ATIO Setting the Output Voltages Start Sequencing The LT3487 has an accurate internal feedback resistor that is trimmed to set the feedback currents to 25µA for each channel. Only one resistor is needed to set the output voltage for each channel.
PAGE 11
LT3487 U U W U APPLICATIO S I FOR ATIO Choosing a Feedback Node The positive channel feedback resistor, R1, may be connected to the VPOS pin or to the CAP pin (see Figure 5). Regulating the VPOS pin eliminates the output offset resulting from the voltage drop across the output disconnect. However, in the case of a short-circuit fault at the VPOS pin, the LT3487 will switch continuously because the FBP pin is low.
PAGE 12
LT3487 U W U U APPLICATIO S I FOR ATIO and the inductors directly from the battery for higher efﬁciency. When the part goes into shutdown, the output load is isolated from the 12V source as soon as the CAP node falls to below VBAT plus 1.2V (13.2V in this case). The VBAT pin is also useful in a system using a 2V supply (such as a 2-cell alkaline battery), below the operating range of the LT3487. A boost converter designed for low voltage operation can provide 3.
PAGE 13
LT3487 U TYPICAL APPLICATIO +15V and –8V Boost and Inverting CCD Bias L2 15µH C2 2.2µF VIN 3V TO 12V SWN L1 10µH VBAT SWP CAP VIN C1 1µF R1 549k LT3487 DN C5 100nF FBP C7 47pF L3 15µH VNEG –8V 90mA C4 4.
PAGE 14
LT3487 U TYPICAL APPLICATIO S +15V and –8V Low VIN CCD Bias L2 15µH C2 2.2µF VIN 2.7V TO 5V SWN L1 10µH VBAT SWP CAP VIN C1 1µF C8 15pF LT3487 DN R1 549k C5 100nF FBP C7 33pF L3 15µH VNEG –8V 80mA C4 4.
PAGE 15
LT3487 U PACKAGE DESCRIPTIO DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 3.00 ±0.10 (4 SIDES) 0.38 ± 0.10 10 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) (DD10) DFN 1103 5 0.200 REF 1 0.75 ±0.05 0.00 – 0.05 0.25 ± 0.05 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1.
PAGE 16
LT3487 U TYPICAL APPLICATIO +24V and –16V LCD Bias L2 22µH C2 2.