Datasheet

LT3475/LT3475-1
6
3475fb
3475 BD
QR
QS
∑
INT REG
AND
UVLO
SLAVE
OSC
SLOPE COMP SLOPE COMP
MOSC 1 MOSC 2
FREQUENCY
FOLDBACK
FREQUENCY
FOLDBACK
+
–
QR
QS
∑
MASTER
OSC
SLAVE
OSC
+
–
DRIVER
gm1 gm2
BOOST1
BOOST2
D1 D2
D3 D4
D
LED1
D
LED 2
Q1 Q2
Q3 Q4
C1 C2
C
IN
C
OUT1
C
OUT2
V
C2
C
C1
V
C1
V
ADJ1
V
ADJ2
V
IN
V
IN
V
IN
R
T
SHDN
C
C2
R
T
GND
EXPOSED
PAD
REF
PWM 1
PWM2
LED1 LED2
SW1 SW2
OUT1
OUT2
0.067Ω 100Ω 0.067Ω100Ω
1.25k
1.25V
1.25k
2V 2V
L1 L2
DRIVER
C1 C2
BLOCK DIAGRAM
R
T
(Pin 14): The R
T
pin is used to set the internal
oscillator frequency. Tie a 24.3k resistor from R
T
to GND
for a 600kHz switching frequency.
SHDN (Pin 16): The SHDN pin is used to shut down the
switching regulator and the internal bias circuits. The
2.6V switching threshold can function as an accurate
undervoltage lockout. Pull below 0.3V to shut down the
LT3475/LT3475-1. Pull above 2.6V to enable the LT3475/
LT3475-1. Tie to V
IN
if the SHDN function is unused.
REF (Pin 17): The REF pin is the buffered output of the
internal reference. Either tie the REF pin to the V
ADJ
pin
for a 1.5A output current, or use a resistor divider to
generate a lower voltage at the V
ADJ
pin. Leave this pin
unconnected if unused.
V
C1
, V
C2
(Pins 18, 13): The V
C
pin is the output of the
internal error amp. The voltage on this pin controls the
peak switch current. Use this pin to compensate the
control loop.
V
ADJ1
, V
ADJ2
(Pins 19, 12): The V
ADJ
pin is the input to
the internal voltage-to-current amplifi er. Connect the V
ADJ
pin to the REF pin for a 1.5A output current. For lower
output currents, program the V
ADJ
pin using the following
formula: I
LED
= 1.5A • V
ADJ
/1.25V.
PWM1, PWM2 (Pins 20, 11): The PWM pin controls the
connection of the V
C
pin to the internal circuitry. When
the PWM pin is low, the V
C
pin is disconnected from the
internal circuitry and draws minimal current. If the PWM
feature is unused, leave this pin unconnected.
PI FU CTIO S
UUU