Datasheet

LT3475/LT3475-1
15
3475fb
Figure 10. Recommended Component Placement
1 2 3 4 5 6 7 8 9
10
20 19 18 17 16 15 14 13 12 11
3475 F10
V
IN
PWM2SHDNPWM1
VIA TO LOCAL GND PLANE
R
T
V
C
GND
LT3475
3475 F09
1M
R
T
10k
220pF
0.1μ
F
PWM1
3.3nF
Figure 9. Extending the PWM Dimming Range
LT3475 to maintain diode current regulation with PWM
pulse widths as short as 7.5 switching cycles (12.5μs for
f
SW
= 600kHz). Maximum PWM period is determined by
the system and is unlikely to be longer than 12ms. Using
PWM periods shorter than 100μs is not recommended.
The maximum PWM dimming ratio (PWM
RATIO
) can be
calculated from the maximum PWM period (t
MAX
) and
minimum PWM pulse width (t
MIN
) as follows:
t
MAX
/t
MIN
= PWM
RATIO
Total dimming ratio (DIM
RATIO
) is the product of the PWM
dimming ratio and the current dimming ratio.
Example:
I
MAX
= 1A, I
MIN
= 0.1A, t
MAX
= 9.9ms
t
MIN
= 3.3μs (f
SW
= 1.4MHz)
I
RATIO
= 1A/0.1A =10:1
PWM
RATIO
= 9.9ms/3.3μs = 3000:1
DIM
RATIO
= 10 • 3000 = 30000:1
To achieve the maximum PWM dimming ratio, use the
circuit shown in Figure 9. This allows PWM pulse widths
as short as 4.5 switching cycles (7.5μs for f
SW
= 600kHz).
Note that if you use the circuit in Figure 9, the rising edge
of the two PWM signals must align within 100ns.
Layout Hints
As with all switching regulators, careful attention must
be paid to the PCB layout and component placement. To
maximize effi ciency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switching path is essential. The voltage signal of the SW
and BOOST pins have sharp rise and fall edges. Minimize
the area of all traces connected to the BOOST and SW
pins and always use a ground plane under the switching
regulator to minimize interplane coupling. In addition, the
ground connection for frequency setting resistor R
T
and
capacitors at V
C1
, V
C2
pins (refer to the Block Diagram)
should be tied directly to the GND pin and not shared
with the power ground path, ensuring a clean, noise-free
connection.
APPLICATIONS INFORMATION