Datasheet
LT3472
5
3472f
BLOCK DIAGRA
W
UU
U
PI FU CTIO S
SWP (Pin 1): Switch Pin for Positive (Boost) Channel.
Connect boost inductor here.
V
IN
(Pin 2): Input Supply Pin. Must be locally bypassed
with a X5R or X7R type ceramic capacitor.
SHDN (Pin 3): Shutdown Pin. Connect to 0.8V or higher to
enable device, 0.3V or less to disable device.
SWN (Pin 4): Switch Pin for Negative (Inverter) Channel.
Connect inverter input inductor and flying capacitor here.
DN (Pin 5): Anode of Internal Schottky for Inverter.
Connect inverter output inductor and flying capacitor
here.
FBN (Pin 6): Feedback Pin for Inverter. Connect feedback
resistor R2 from this pin to V
O2
. Choose R2 according to
V
O2
= 1.25 • R2/50k. Pin voltage = 0V when regulated.
SSN (Pin 7): Soft Start-Up Pin for Inverter. Connect a cap
here for soft start-up. Leave open for quick start-up. This
pin is connected to 1.25V with a 50k resistor internally.
FBP (Pin 8): Feedback Pin for Boost. Connect boost
feedback resistor R1 from this Pin to V
O1
. Choose R1
according to V
O1
= 1.25 • (1 + R1/50k). Pin voltage = 1.25V
when regulated.
SSP (Pin 9): Soft Start-Up Pin for Boost. Connect a cap
here for soft start-up. Leave open for quick start-up. This
pin is connected to 1.25V with a 50k resistor internally.
V
POS
(Pin 10): Output Pin for Boost. Connect boost output
capacitor here.
GND (Exposed Pad) (Pin 11): GND Pin. Tie directly to
ground plane through multiple vias under the package for
optimum thermal performance.
Figure 1. LT3472 Block Diagram
–
+
–
+
–
+
∑
A1
A2
8
1
10
COMPARATOR
50k
50k
RAMP
GENERATOR
1.2MHz
OSCILLATOR
R
X1
Q
S
11
–
+
–
+
–
+
∑
A3
A4
6
2
4
3
COMPARATOR
RAMP
GENERATOR
R
X2
Q
S
5
DRIVER 1
DRIVER 2
DN
DP
DN
SWN
SHDN
GND
SWP
V
POS
V
REF
1.25V
FBP
V
IN
FBN
50k
50k
SSN
SSP
Q1
Q2
3472 BD
7
9
1.25V