Datasheet

LT3470
13
3470fd
applicaTions inForMaTion
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Note that large,
switched currents flow in the power switch, the internal
catch diode and the input capacitor. The loop formed by
these components should be as small as possible. Further-
more, the system ground should be tied to the regulator
ground in only one place; this prevents the switched cur-
rent from injecting noise into the system ground. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components,
and tie this ground plane to system ground at one location,
ideally at the ground terminal of the output capacitor C2.
Additionally, the SW and BOOST nodes should be kept as
small as possible. Unshielded inductors can induce noise
in the feedback path resulting in instability and increased
output ripple. To avoid this problem, use vias to route the
V
OUT
trace under the ground plane to the feedback divider
(as shown in Figure 5). Finally, keep the FB node as small
as possible so that the ground pin and ground traces
will shield it from the SW and BOOST nodes. Figure 5
shows component placement with trace, ground plane
and via locations. Include vias near the GND pin, or pad,
of the LT3470 to help remove heat from the LT3470 to
the ground plane.
Figure 5. A Good PCB Layout Ensures Proper, Low EMI Operation
SHDN
V
IN
V
OUT
(5a) (5b)
V
OUT
3470 F05
GND
SHDN
V
IN
GND
C1
C2
VIAS TO FEEDBACK DIVIDER
VIAS TO LOCAL GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE