Datasheet

LT3467/LT3467A
5
3467afe
PIN FUNCTIONS
(DFN/TSOT)
FB (Pin 1/Pin 3): Feedback Pin. Reference voltage is 1.255V.
Connect resistive divider tap here. Minimize trace area at
FB. Set V
OUT
= 1.255V(1 + R1/R2).
GND (Pins 2, 5, 9/Pin 2): Ground. Tie directly to local
ground plane.
SW (Pins 3, 4/Pin 1): Switch Pin. (Collector of internal
NPN power switch) Connect inductor/diode here and
minimize the metal trace area connected to this pin to
minimize EMI.
V
IN
(Pin 6/Pin 6): Input Supply Pin. Must be locally
bypassed.
SS (Pin 7/Pin 5): Soft-Start Pin. Place a soft-start capacitor
here. Upon start-up, 4μA of current charges the capacitor
to 1.255V. Use a larger capacitor for slower start-up. Leave
fl oating if not in use.
SHDN (Pin 8/Pin 4): Shutdown Pin. Tie to 2.4V or more
to enable device. Ground to shut down.
BLOCK DIAGRAM
–
+
–
+
RQ
S
0.01Ω
SW
DRIVER
COMPARATOR
SHDN
V
IN
SS
FB
–
+
3
RAMP
GENERATOR
1.255V
REFERENCE
R
C
C
C
1.3MHz
OSCILLATOR*
GND
3467 F01
Q1
A2
A1
R1 (EXTERNAL)
R2 (EXTERNAL)
FB
V
OUT
SHUTDOWN
250k
*2.1MHz FOR LT3467A
Figure 1. Block Diagram