Datasheet

24
LT3437
3437fc
APPLICATIO S I FOR ATIO
WUU
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Figure 10. Model for Loop Response
–
+
CURRENT MODE
POWER STAGE
g
m
= 1
Ω
g
m
= 650µ
Ω
1.25V
V
C
LT3437
ERROR
AMP
1.6MR
C
R1
FB
SW
ESR
OUTPUT
R2
C
OUT
3437 F13
C
FB
C
F
C
C
Figure 11. Overall Loop Response
FREQUENCY (Hz)
–180
–160
–140
–120
–100
–80
–60
–40
–20
PHASE (DEG)
0
–40
GAIN (dB)
0
60
40
20
–20
80
100
100 1k 10k 100k
3437 F12
1M10
V
OUT
= 3.3V
C
OUT
= 100µF, 0.1Ω
C
F
= 330pF
R
C
= 25k
C
C
= 1500pF
I
LOAD
= 250mA
A zero can be added into the loop by placing a resistor (R
C
)
at the V
C
pin in series with the compensation capacitor, C
C
,
or by placing a capacitor (C
FB
) between the output and the
FB pin.
When using R
C
, the maximum value has two limitations.
First, the combination of output capacitor ESR and R
C
may
stop the loop rolling off altogether. Second, if the loop gain
is not rolled off sufficiently at the switching frequency,
output ripple will perturb the V
C
pin enough to cause
unstable duty cycle switching, similar to subharmonic
oscillations. If needed, an additional capacitor (C
F
) can be
added across the R
C
/C
C
network from the V
C
pin to ground
to further suppress V
C
ripple voltage.
With a tantalum output capacitor, the LT3437 already
includes a resistor (R
C
) and filter capacitor (C
F
) at the V
C
pin (see Figures 10 and 11) to compensate the loop over
the entire V
IN
range (to allow for stable pulse skipping for
high V
IN
-to-V
OUT
ratios ≥ 10). A ceramic output capacitor
can still be used with a simple adjustment to the resistor R
C
for stable operation (see Ceramic Capacitors section for
stabilizing LT3430). If additional phase margin is required,
a capacitor (C
FB
) can be inserted between the output and
FB pin, but care must be taken for high output voltage
applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For V
IN
-to-V
OUT
ratios < 10, higher loop bandwidths are
possible by readjusting the frequency compensation com-
ponents at the V
C
pin.
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and tem-
perature range. Proper loop compensation may be obtained
by empirical methods, as described in Application Notes
19 and 76.