Datasheet

10
LT3437
3437fc
The LT3437 is a constant frequency, current mode buck
converter. This means that there is an internal clock and two
feedback loops that control the duty cycle of the power
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscilla-
tor pulse which sets the RS latch to turn the switch on. When
switch current reaches a level set by the current compara-
tor, the latch is reset and the switch turns off. Output volt-
age control is obtained by using the output of the error
amplifier to set the switch current trip point. This technique
means that the error amplifier commands current to be
delivered to the output rather than voltage. A voltage fed
system will have low phase shift up to the resonant fre-
quency of the inductor and output capacitor, then an abrupt
180° shift will occur. The current fed system will have 90°
phase shift at a much lower frequency, but will not have the
additional 90° shift until well beyond the LC resonant fre-
quency. This makes it much easier to frequency compen-
sate the feedback loop and gives much quicker transient
response and line rejection.
Most of the circuitry of the LT3437 operates from an
internal 2.4V bias line. The bias regulator normally draws
power from the V
IN
pin, but if the BIAS pin is connected to
an external voltage higher than 2.7V, bias power will be
drawn from the external source (typically the regulated
output voltage). This improves efficiency.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing the switch to be saturated.
This boosted voltage is generated with an external capaci-
tor and diode.
To further optimize efficiency, the LT3437 automatically
switches to Burst Mode operation in light load situations. In
Burst Mode operation, all circuitry associated with control-
ling the output switch is shut down, reducing the input
supply current to 45µA and bias input current to 110µA.
If lower output ripple is desired over light load efficiency,
Burst Mode operation can be defeated by setting the SYNC
pin voltage greater than 2V. A logic-level low on the SHDN
pin disables the IC and reduces input supply current to less
than 1µA. External synchronization can be implemented
by driving the SYNC pin with logic-level inputs.
BLOCK DIAGRA
W
Figure 1. LT3437 Block Diagram
FB
V
C
Σ
INTERNAL REF
UNDERVOLTAGE
LOCKOUT
THERMAL
SHUTDOWN
SOFT-START
FOLDBACK
DETECT
SLOPE
COMP
ANTISLOPE
COMP
2.4V
–
+
1.3V
1.25V
SHDN
C
SS
SYNC
BIAS
V
IN
SHDN
COMP
–
+
–
+
ERROR
AMP
BURST MODE
DETECT
200kHz
OSCILLATOR
SWITCH
LATCH
CURRENT
COMP
DRIVER
CIRCUITRY
R
Q
SW
S
BOOST
PGND
GND
V
C
CLAMP
3437 BD