Datasheet

20
LT3431
sn3431 3431fs
Note: Some of the internal power dissipation in the IC, due
to BOOST pin voltage, can be transferred outside of the IC
to reduce junction temperature, by increasing the voltage
drop in the path of the boost diode D2. (see Figure␣ 9). This
reduction of junction temperature inside the IC will allow
higher ambient temperature operation for a given set of
conditions. BOOST pin circuitry dissipates power given
by:
P
VI V
V
DISS BOOST
OUT SW C
IN
()
•( / )•
=
36
2
Typically V
C2
(the boost voltage across the capacitor C2)
equals V
OUT
. This is because diodes D1 and D2 can be
considered almost equal, where:
V
C2
= V
OUT
– V
FD2
– (–V
FD1
) = V
OUT
.
Hence the equation used for boost circuitry power dissipa-
tion given in the previous Thermal Calculations section is
stated as:
P
VI V
V
DISS BOOST
OUT SW OUT
IN
()
•( / )•
=
36
Here it can be seen that Boost power dissipation increases
as the square of Vout. It is possible, however, to reduce
V
C2
below Vout to save power dissipation by increasing
the voltage drop in the path of D2. Care should be taken
that V
C2
does not fall below the minimum 3.3V Boost
voltage required for full saturation of the internal power
switch. For output voltages of 5V, V
C2
is approximately 5V.
During switch turn on, V
C2
will fall as the boost capacitor
C2 is dicharged by the boost pin. In a previous BOOST Pin
section, the value of C2 was designed for a 0.7V droop in
V
C2
= V
DROOP
. Hence, an output voltage as low as 4V
would still allow the minimum 3.3V for the boost function
using the C2 capacitor calculated. If a target output voltage
of 12V is required, however, an excess of 8V is placed
across the boost capacitor which is not required for the
boost function, but still dissipates additional power. What
is required is a voltage drop in the path of D2 to achieve
minimal power dissipation while still maintaining mini-
mum boost voltage across C2. A zener, D4, placed in
series with D2 (see Figure 9), drops voltage to C2.
Example : The BOOST pin power dissipation for a 20V input
to 12V output conversion at 2A is given by :
PW
BOOST
==
12 2 36 12
20
04
•( / )•
.
If a 7V zener D4 is placed in series with D2, then power
dissipation becomes :
PW
BOOST
==
12 2 36 5
20
0 167
•( / )•
.
For an FE package with thermal resistance of 45°C/W,
ambient temperature savings would be, T
(AMBIENT)
sav-
ings = 0.233W • 45°C/W = 11°C. The 7V zener should be
sized for excess of 0.233W operaton. The tolerances of the
zener should be considered to ensure minimum V
C2
ex-
ceeds 3.3V + V
DROOP
.
APPLICATIO S I FOR ATIO
WUUU
C2
C
F
D1
3431 F09
C3
R
C
C
C
D2
D2 D4
L1
C1
R1
R2
BOOST
V
IN
V
IN
LT3431
SHDN
SYNC
SW
BIAS
FB
V
C
GND
+
Figure 9. BOOST Pin, Diode Selection
Input Voltage vs Operating Frequency Considerations
The absolute maximum input supply voltage for the LT3431
is specified at 60V. This is based on internal semiconduc-
tor junction breakdown effects. The practical maximum
input supply voltage for the LT3431 may be less than 60V
due to internal power dissipation or switch minimum on
time considerations.
For the extreme case of an output short-circuit fault to
ground, see the section Short-Circuit Considerations.