Datasheet

16
LT3431
sn3431 3431fs
APPLICATIO S I FOR ATIO
WUUU
Threshold voltage for lockout is about 2.38V. A 5.5µA bias
current flows out of the pin at this threshold. The internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making R
LO
10k or less. If shutdown
current is an issue, R
LO
can be raised to 100k, but the error
due to initial bias current and changes with temperature
should be considered.
Rk
R
RV V
VR A
LO
HI
LO IN
LO
=
()
=
−
()
−
()
10
238
238 55
to 100k 25k suggested
.
..µ
V
IN
= Minimum input voltage
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high
resistor values are used, the shutdown pin should be
bypassed with a 1000pF capacitor to prevent coupling
problems from the switch node. If hysteresis is desired in
the undervoltage lockout point, a resistor R
FB
can be
added to the output node. Resistor values can be calcu-
lated from:
R
RV VV V
RA
RRV V
HI
LO IN OUT
LO
FB HI OUT
=
−+
()
+
[]
−
()
=
()( )
238 1
238 55
./
..
/
∆∆
∆
µ
25k suggested for R
LO
V
IN
= Input voltage at which switching stops as input
voltage descends to trip level
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. ∆V is therefore 1.5V and
V
IN
␣ =␣ 12V. Let R
LO
= 25k.
R
k
kA
k
k
Rk k
HI
FB
=
−+
()
+
[]
µ
()
=
()
=
=
()
=
25 12 238155 1 15
238 25 55
25 10 41
224
116
116 5 1 5 387
../ .
.– .
.
.
/.
SYNCHRONIZING
The SYNC input must pass from a logic level low, through
the maximum synchronization threshold with a duty cycle
between 10% and 90%. The input can be driven directly
from a logic level output. The synchronizing range is equal
to initial operating frequency up to 700kHz. This means
that minimum practical sync frequency is equal to the
worst-case high self-oscillating frequency (570kHz), not
the typical operating frequency of 500kHz. Caution should
be used when synchronizing above 662kHz because at
higher sync frequencies the amplitude of the internal slope
compensation used to prevent subharmonic switching is
–
+
–
+
2.38V
0.4V
GND
V
SW
LT3431
INPUT
R
FB
R
HI
3431 F04
OUTPUT
C1
L1
SHDN
STANDBY
IN
TOTAL
SHUTDOWN
5.5µA
R
LO
C2
+
Figure 4. Undervoltage Lockout