Datasheet

LT3090
15
3090fa
For more information www.linear.com/LT3090
applicaTions inForMaTion
One problem that conventional linear regulators face is
that the resistor divider setting V
OUT
gains up the refer-
ence noise. In contrast, the LT3090’s unity gain follower
architecture
presents no gain from the SET pin to the
output. Therefore, output noise is virtually independent
of the output voltage setting if a capacitor bypasses the
SET pin. Resultant output noise is then set by the error
amplifier’s noise, typically 57nV/√Hz (18µV
RMS
in a 10Hz
to 100kHz bandwidth).
Curves in the Typical Performance Characteristics sec-
tion show noise spectral density and peak-to-peak noise
characteristics for both the reference current and the error
amplifier over a 10Hz to 100kHz bandwidth.
Set Pin (Bypass) Capacitance: Output Noise, PSRR,
Transient Response and Soft-Start
Bypassing the SET pin’s voltage setting resistor with a
capacitor lowers output noise. The Typical Performance
Characteristics section illustrates that connecting a 0.1µF
from SET to GND yields output noise as low as 18µV
RMS
.
Paralleling multiple LT3090s further reduces noise by √N,
for N parallel regulators. Curves in the Typical Performance
Characteristics section show noise spectral density and
peak-to-peak noise characteristics for the error amplifier
for different values
of bypass capacitance.
Use
of a SET pin bypass capacitor also improves PSRR
and transient response performance. It is important to
note that any bypass capacitor leakage deteriorates the
LT3090’s DC regulation. Capacitor leakage of even 50nA
is a 0.1% DC error. Therefore, LTC recommends the use
of a good quality low leakage capacitor.
The final benefit of using a SET pin bypass capacitor is
that it soft starts the output and limits inrush current. The
R-C time constant, formed by the SET pin resistor and
capacitor, controls soft-start time. Ramp-up rate from 0
to 90% of nominal V
OUT
is:
t
SS
≈ 2.3 • R
SET
• C
SET
For applications requiring higher accuracy or an adjustable
output voltage, the SET pin may be actively driven by an
external voltage source capable of sourcing 50µA – the
application limitations are the creativity and ingenuity of
the circuit designer. For instance, connecting a precision
voltage reference to the SET pin removes any errors in
output voltage due to the reference current and resistor
tolerances.
Shutdown/UVLO
The SHDN pin is used to put the LT3090 into a micro-
power shutdown state. The LT3090 has an accurate –1.27V
turn-ON threshold on the SHDN pin.
This threshold can be
used in conjunction with a resistor divider from the input
supply to define an accurate undervoltage lockout (UVLO)
threshold for the regulator. The SHDN pin current (at the
threshold) needs to be considered when determining the
resistor divider network. See the Typical Performance
curves for SHDN pin current vs SHDN pin voltage.
Moreover, since the SHDN pin is bidirectional, it can be
taken beyond ±1.4V to turn-ON the LT3090. In bipolar
supply applications, the positive SHDN threshold can be
used to sequence the turn-ON of LT3090 after the positive
regulator has turned on.
Current Monitoring (IMONN and IMONP)
The LT3090 incorporates precision positive or negative
current monitor. As illustrated in the Block Diagram, the
negative current monitor pin (IMONN) sinks current pro
-
portional (1:1000) to the
output current while the positive
current monitor pin (IMONP) sources current proportional
(1:2000) to the output current. For proper operation, ensure
IMONN is at least 2V above IN and IMONP.
As highlighted in Figure 5, for a negative current monitor
application, tie IMONP to IN and tie IMONN through a
Figure 5: Negative Output Current Monitor
LT3090
GND
1mV PER mA
ILIM
SHDN
3090 F05
I
OUT
2000
IMONN
OUT
SET
4.7µF
IN
V
IN
–3V TO –10V
IMONP
4.7µF
V
OUT
: –2.5
MAX I
OUT
: 600mA
10k
0.1µF 49.9k 1k
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