Datasheet

LT3071
21
3071fb
For more information www.linear.com/3071
ApplicAtions inFormAtion
Reverse Voltage
The LT3071 incorporates a circuit that detects if V
IN
decreases below V
OUT
. This reverse-voltage detector has
a typical threshold of about (V
IN
– V
OUT
) = –6mV. If the
threshold is exceeded, this detector circuit turns off the
drive to the internal NMOS pass transistor, thereby turning
off the output. The output pulls low with the load current
discharging the output capacitance. This circuit’s intent
is to limit and prevent back-feed current from OUT to IN
if the input voltage collapses due to a fault or overload
condition.
Thermal Considerations
The LT3071’s maximum rated junction temperature of
125°C limits its power handling capability and is domi-
nated by the output current multiplied by the input/output
voltage differential:
I
OUT
• (V
IN
– V
OUT
)
The LT3071’s internal power and thermal limiting circuitry
protect it under overload conditions. For continuous nor-
mal load conditions, do not exceed the maximum junction
temperature of 125°C. Give careful consideration to all
sources of thermal resistance from junction to ambient.
This includes junction to case, case-to-heat sink interface,
heat sink resistance or circuit board to ambient as the
application dictates. Also, consider additional
heat sources
mounted
in proximity to the LT3071. The LT3071 is a
surface mount device and as such, heat sinking is ac-
complished by using the heat spreading capabilities of the
PC board and its copper traces. Surface mount heat sinks
and plated through-holes can also be used to spread the
heat generated by power devices. Junction-to-case thermal
resistance is specified from the IC junction to the bottom
of the case directly below the die. This is the lowest resis-
tance path for heat flow. Proper mounting is required to
ensure the best possible thermal flow from this area of the
package to the heat sinking material. Note that the exposed
pad is electrically connected to GND.
Table 3 lists thermal resistance as a function of copper
area in a fixed board size. All measurements were taken
in still air on a 4-layer FR-4 board with 1 oz solid internal
planes and 2 oz top/bottom external trace planes with a
total board thickness of 1.6mm. PCB layers, copper weight,
board layout and thermal vias affect the resultant thermal
resistance. For further information on thermal resistance
and high thermal conductivity test boards, refer to JEDEC
standard JESD51, notably JESD
51-12 and JESD51-7.
Achieving
low thermal resistance necessitates attention
to detail and careful PCB layout.
Table 3, UFD Plastic Package, 28-Lead QFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACK SIDE
2500mm
2
2500mm
2
2500mm
2
30°C/W
1000mm
2
2500mm
2
2500mm
2
32°C/W
225mm
2
2500mm
2
2500mm
2
33°C/W
100mm
2
2500mm
2
2500mm
2
35°C/W
*Device is mounted on topside