Datasheet

LT3071
17
3071fc
For more information www.linear.com/LT3071
APPLICATIONS INFORMATION
Output Voltage Margining
The LT3071’s analog margining pin, MARGA, provides a
continuous output voltage adjustment range of ±10%. It
margins V
OUT
by adjusting the internal 600mV reference
voltage up and down. The MARGA pin’s typical input
impedance is 190kΩ between MARGA and the internal
V
REF
node. Driving MARGA with 600mV to 1.2V provides
0% to 10% of adjustment. Driving MARGA with 600mV to
0V provides 0% to –10% of adjustment. If unused, allow
MARGA to float or bypass this pin with a 1nF capacitor to
GND. Note that the analog margining function does not
adjust the PWRGD threshold. Therefore, negative analog
margining may trip the PWRGD comparator and toggle
the PWRGD flag.
Enable Function—Turning On and Off
The EN pin enables/disables the output device only. The
LT3071 reference and all support functions remain active
if V
BIAS
is above its UVLO threshold. Pulling the EN pin
low puts the LT3071 into nap mode. In nap mode, the
reference circuit is active, but the output is disabled and
quiescent current decreases.
Drive the EN pin with either a digital logic port or an open-
collector NPN or an open-drain NMOS terminated with
a pull-up resistor to
V
BIAS
. The pull-up resistor must be
less than 35k to meet the V
IH
condition of the EN pin. If
unused, connect EN to BIAS.
Input Undervoltage Lockout on BIAS Pin
An internal undervoltage lockout (UVLO) comparator
monitors the BIAS supply voltage. If V
BIAS
drops below
the UVLO threshold, all functions shut down, the pass
transistor is gated off and output current falls to zero. The
typical BIAS pin UVLO threshold is 1.55V on the rising
edge of V
BIAS
. The UVLO circuit incorporates about 150mV
of hysteresis on the falling edge of V
BIAS
.
High Efficiency Linear Regulator—Input-to-Output
Voltage Control
The VIOC (voltage input-to-output control) pin is a func
-
tion to control a switching regulator and facilitate a design
solution that maximizes system efficiency at high load cur-
rents and
still provides low dropout voltage performance.
The
VIOC pin is the output of an integrated transcon-
ductance amplifier
that sources and sinks about 250µA
of current. It typically regulates the output of most LTC
®
switching regulators or LTM
®
power modules, by sinking
current from the ITH compensation node. The VIOC function
controls a buck regulator powering the LT3071’s input by
maintaining the
LT3071’s input voltage to V
OUT
+ 300mV.
This 300mV V
IN
-V
OUT
differential voltage is chosen to
provide fast transient response and good high frequency
PSRR while minimizing power dissipation and maximizing
efficiency. For example, 1.5V to 1.2V conversion and 1.3V
to 1V conversion yield 1.5W maximum power dissipation
at 5A full output current.
Figure 2 depicts that the switcher’s feedback resistor net
-
work sets the
maximum switching regulator output voltage
if the linear regulator is disabled. However, once the LT3071
is enabled, the VIOC feedback loop decreases the switching
regulator output voltage back to V
OUT
+ 300mV.
Using the VIOC function creates a feedback loop between
the LT3071 and the switching regulator. As such, the
feedback loop must be frequency compensated for sta
-
bility. Fortunately,
the connection of VIOC to many LTC
switching regulator ITH pins represents a high impedance
characteristic which is the optimum circuit node to fre
-
quency compensate the feedback loop. Figure 2 illustrates
the typical frequency compensation network used at the
VIOC node to GND.
The VIOC amplifier characteristics are:
g
m
= 3.2mS, I
OUT
= ±250µA, BW = 10MHz.
If the VIOC function is not used, terminate the VIOC
pin to GND with a small
capacitor (1000pF) to
prevent
oscillations.
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