Datasheet

LT3070
22
3070fb
For more information www.linear.com/LT3070
APPLICATIONS INFORMATION
heat sink resistance or circuit board to ambient as the
application dictates. Also, consider additional heat sources
mounted in proximity to the LT3070. The LT3070 is a surface
mount device and as such, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heat sinks and
plated through-holes can also be used to spread the heat
generated by power devices. Junction-to-case thermal
resistance is specified from the IC junction to the bottom
of the case directly below the die. This is the lowest resis-
tance path for heat flow. Proper mounting is required to
ensure the best possible thermal flow from this area of the
package to the heat sinking material. Note that the exposed
pad is electrically connected to GND.
Table 3 lists thermal resistance as a function of copper
area in a fixed board size. All measurements were taken
in still air on a 4-layer FR-4 board with 1 oz solid internal
planes and 2 oz top/bottom external trace planes with a
total board thickness of 1.6mm. PCB layers, copper weight,
board layout and thermal vias affect the resultant thermal
resistance. For further information on thermal resistance
and high thermal conductivity test boards, refer to JEDEC
standard JESD51, notably JESD51-12 and JESD51-7.
Achieving low thermal resistance necessitates attention
to detail and careful PCB layout.
Table 3, UFD Plastic Package, 28-Lead QFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACK SIDE
2500mm
2
2500mm
2
2500mm
2
30°C/W
1000mm
2
2500mm
2
2500mm
2
32°C/W
225mm
2
2500mm
2
2500mm
2
33°C/W
100mm
2
2500mm
2
2500mm
2
35°C/W
*Device is mounted on topside
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, an input voltage
range of 1.2V ± 5%, a BIAS voltage of 2.5V, a maximum out-
put current of 4A and a maximum ambient temperature of
50°C, what will the maximum junction temperature be?
The power dissipated by the device equals:
I
OUT(MAX)
• (V
IN(MAX)
– V
OUT
) + (I
BIAS
– I
GND
) • V
OUT
+ I
GND
• V
BIAS
where:
I
OUT(MAX)
= 4A
V
IN(MAX)
= 1.26V
I
BIAS
at (I
OUT
= 4A, V
BIAS
= 2.5V) = 6.91mA
I
GND
at (I
OUT
= 4A, V
BIAS
= 2.5V) = 0.87mA
thus:
P = 4A(1.26V – 0.9V) + (6.91mA – 0.87mA)0.9V +
0.87mA(2.5V) = 1.448W
With the QFN package soldered to maximum copper
area, the thermal resistance is 30°C/W. So the junction
temperature rise above ambient equals:
1.448W at 30°C/W = 43.44°C
The maximum junction temperature equals the maximum
ambient temperature plus the maximum junction tempera-
ture rise above ambient or:
T
JMAX
= 50°C + 43.44°C = 93.44°C
Applications that cannot support extensive PCB space
for heat sinking the LT3070 require a derating of output
current or increased airflow.
Paralleling Devices for Higher I
OUT
Multiple LT3070s may be paralleled to obtain higher output
current. This paralleling concept borrows from the scheme
employed by the LT3080.
To accomplish this paralleling, tie the REF/BYP pins of
the paralleled regulators together. This effectively gives
an averaged value of multiple 600mV reference voltage
sources. Tie the OUT pins of the paralleled regulators to
the common load plane through a small piece of PC trace
ballast or an actual surface mount sense resistor beyond
the primary output capacitors of each regulator. The re-
quired ballast is dependent upon the application output
voltage and peak load current. The recommended ballast
is that value which contributes 1% to load regulation. For
example, two LT3070 regulators configured to output 1V,
sharing a 10A load require 2mΩ of ballast at each output.
The Kelvin SENSE pins connect to the regulator side of
the ballast resistors to keep the individual control loops
from conflicting with each other (see Figures 8 and 9).