Datasheet

LT3055
16
3055f
For more information www.linear.com/LT3055
APPLICATIONS INFORMATION
Adjustable Operation
The adjustable LT3055 has an output voltage range of
0.6V to 40V. The output voltage is set by the ratio of
two external resistors, as shown in Figure 4. The device
servos the output to maintain the ADJ pin voltage at 0.6V
referenced to ground. The current in R1 is then equal to
0.6V/R1, and the current in R2 is the current in R1 minus
the ADJ pin bias current.
The ADJ pin bias current, 16nA at 25°C, flows from the
ADJ pin through R1 to GND. Calculate the output voltage
using the formula in Figure 4. The value of R1 should be
no greater than 62k to provide a minimum 10μA load cur-
rent so that output voltage errors, caused by the ADJ pin
bias current, are minimized. Note that in shutdown, the
output is turned off and the divider current is zero. Curves
of ADJ Pin Voltage vs Temperature and ADJ Pin Bias Cur-
rent vs Temperature appear in the Typical Performance
Characteristics section.
The LT3055 is tested and specified with the ADJ pin tied
to the OUT pin, yielding V
OUT
= 0.6V. Specifications for
output voltages greater than 0.6V are proportional to the
ratio of the desired output voltage to 0.6V: V
OUT
/0.6V. For
example, load regulation for an output current change of
1mA to 500mA is 0.5mV (typical) at V
OUT
= 0.6V. At V
OUT
= 12V, load regulation is:
12V
0.6V
• 0.5mV
( )
= 10mV
Table 2 shows 1% resistor divider values for some common
output voltages with a resistor divider current of 10μA.
Table 2. Output Voltage Resistor Divider Values
V
OUT
(V) R1 (kΩ) R2 (kΩ)
1.2 60.4 60.4
1.5 59 88.7
1.8 59 118
2.5 60.4 191
3 59 237
3.3 61.9 280
5 59 432
Figure 4. Adjustable Operation
V
IN
V
OUT
IN OUT
+
LT3055
SHDN ADJ
GND
3055 F04
R2
R1
V
OUT
= 0.6V 1+
R2
R1






– I
ADJ
•R2
( )
TT
V
ADJ
= 0.6V
I
ADJ
=16nA AT 25°C
OUTPUT RANGE = 0.6V TO 40V
Bypass Capacitance and Output Voltage Noise
The LT3055 regulator provides low output voltage
noise over a 10Hz to 100kHz bandwidth while operat-
ing at full load with the addition of a bypass capacitor
(C
REF/BYP
) from the REF/BYP pin to GND. A high quality
low leakage capacitor is recommended. This capacitor
bypasses the internal reference of the regulator, provid-
ing a low frequency noise pole for the internal reference.
With the use of 10nF for C
REF/BYP
, output voltage noise
decreases to as low as 25μV
RMS
when the output voltage
is set for 0.6V. For higher output voltages (generated by
using a feedback resistor divider), the output voltage noise
gains up proportionately when using C
REF/BYP
.
To lower the higher output voltage noise, include a feed-
forward capacitor (C
FF
) from V
OUT
to the ADJ pin. A high
quality, low leakage capacitor is recommended. This
capacitor bypasses the error amplifier of the regulator,
providing an additional low frequency noise pole. With
the use of 10nF for both C
FF
and C
REF/BYP
, output voltage
noise decreases to 25μV
RMS
when the output voltage is
set to 5V by a 10μA feedback resistor divider. If the cur-
rent in the feedback resistor divider is doubled, C
FF
must
also be doubled to achieve equivalent noise performance.
Higher values of output voltage noise can occur if care
is not exercised with regard to circuit layout and testing.
Crosstalk from nearby traces induces unwanted noise
onto the LT3055’s output. Power supply ripple rejection
must also be considered. The LT3055 regulator does not
have unlimited power supply rejection and passes a small
portion of the input noise through to the output.