Datasheet

LT3055
11
3055f
For more information www.linear.com/LT3055
PIN FUNCTIONS
IN (Pins 1, 2): Input. These pins supply power to the
device. The LT3055 requires a local IN bypass capacitor
if it is located more than six inches from the main input
filter capacitor. In general, battery output impedance rises
with frequency, so adding a bypass capacitor in battery-
powered circuits is advisable. A bypass capacitor in the
range of 1µF to 10µF is sufficient. See Input Capacitance
and Stability in the Applications Information section for
more information.
The LT3055 regulator withstands reverse voltages on the
IN pins with respect to ground and the OUT pins. In the
case of a reverse input, which can happen if a battery is
plugged in backwards, the device acts as if there is a diode
in series with its input. No reverse current flows into the
regulator and no reverse voltage appears at the load.The
device protects both itself and the load.
SHDN (Pin 3): Shutdown. Pulling the SHDN pin low puts
the LT3055 into a low power state and turns the output off.
Drive the SHDN pin with either logic or an open-collector/
drain with a pull-up resistor. The resistor supplies the
pull-up current to the open-collector/drain logic, normally
several microamperes, and the SHDN pin current, typically
less than 2μA. If unused, connect the SHDN pin to IN. The
LT3055 does not function if the SHDN pin is not connected.
FAULT1 (Pin 4), FAULT2 (Pin 5): Fault Indicator Pins.
FAULT1 and FAULT2 are open-collector logic pins. If the
output current drops below the minimum current thresh-
old, FAULT1 asserts low. If the output current exceeds the
current limit threshold, FAULT2 asserts low. If the LT3055
enters thermal shutdown, both FAULT1 and FAULT2 assert
low. The FAULT1 and FAULT2 pins are capable of sinking
50μA. There is no internal pull-up resistor; an external
pull-up resistor must be used.
PWRGD (Pin 6): Power Good Pin. The PWRGD pin is an
open-collector output that actively pulls low if the output
is less than 90% of the nominal output value. The PWRGD
pin is capable of sinking 50μA. There is no internal pull-up
resistor, an external pull-up resistor must be used.
TEMP (Pin 7): Temperature Output. The TEMP pin outputs
a voltage proportional to the average junction temperature.
The pin voltage is 250mV for 25°C and has a slope of
10mV/°C.The TEMP pin output impedance is approximately
1500Ω. The TEMP pin is stable with no bypass capacitor
or with a bypass capacitor with a value between 100pF
and 1nF. A 100pF capacitor is recommended to improve
TEMP pin power supply rejection.
I
MON
(Pin 8): Output Current Monitor. This pin is the col-
lector of a PNP current mirror that outputs 1/500th of the
power PNP current. The I
MON
pin requires a small (22nF
minimum) decoupling capacitor. In applications where the
I
MON
pin is used in an external feedback network (current
sharing, cable drop compensation, etc.) smaller bypass
capacitance values may be used to ensure stability of the
external feedback network. If not used, tie I
MON
to GND.
I
MIN
(Pin 9): Minimum Output Current Programming
Pin. This pin is the collector of a PNP current mirror that
outputs 1/2000th of the power PNP load current. This pin
is also the input to the minimum output current fault com-
parator. Connecting a resistor between I
MIN
and GND sets
the minimum output current fault threshold. For detailed
information on how to set the I
MIN
pin resistor value, please
see the Operation section. A small external decoupling
capacitor (10nF minimum) is required to improve I
MIN
PSRR. If minimum output current programming is not
required, float the I
MIN
pin (unconnected).
I
MAX
(Pin 10): Precision Current Limit Programming Pin.
This pin is the collector of a current mirror PNP that is
1/500th the size of the output power PNP. This pin is also the
input to the current limit amplifier. Current limit threshold
is set by connecting a resistor between the I
MAX
pin and
GND. For detailed information on how to set the I
MAX
pin
resistor value, please see the Operation section. The I
MAX
pin requires a 22nF decoupling capacitor to ground. If not
used, tie I
MAX
to GND.