Datasheet

LT3045
21
Rev. B
For more information www.analog.com
APPLICATIONS INFORMATION
If OUTS is externally held above SET, the current sink
turns ON in an attempt to restore OUTS to its programmed
voltage. The current sink remains ON until the external
circuitry releases OUTS.
Direct Paralleling for Higher Current
Higher output current is obtained by paralleling multiple
LT3045s. Tie all SET pins together and all IN pins together.
Connect the OUT pins together using small pieces of PCB
trace (used as a ballast resistor) to equalize currents in
the LT3045s. PCB trace resistance in milliohms/inch is
shown in Table 2.
Table 2. PC Board Trace Resistance
WEIGHT (oz) 10mil WIDTH 20mil WIDTH
1 54.3 27.1
2 27.1 13.6
Trace resistance is measured in mΩ/in.
The small worst-case offset of 2mV for each paralleled
LT3045 minimizes the required ballast resistor value.
Figure 7 illustrates that two LT3045s, each using a 20mΩ
PCB trace ballast resistor, provide better than 20% accurate
output current sharing at full load. The two 20mΩ external
resistors only add 10mV of output regulation drop with a
1A maximum current. With a 3.3V output, this only adds
0.3% to the regulation accuracy. As has been discussed
previously, tie the OUTS pin directly to the output capacitor.
More than two LT3045s can also be paralleled for even
higher output current and lower output noise. Paralleling
multiple LT3045s is also useful for distributing heat on the
PCB. For applications with high input-to-output voltage
differential, an input series resistor or resistor in parallel
with the LT3045 can also be used to spread heat.
PCB Layout Considerations
Given the LT3045’s high bandwidth and ultrahigh PSRR,
careful PCB layout must be employed to achieve full device
performance. Figure 8 shows a recommended layout that
delivers full performance of the regulator. Refer to the
LT3045’s DC2491A demo board manual for further details.
Figure 8. Recommended DFN Layout
+
–
100µA
IN
EN/UV
PGFB
GND
OUT
LT3045
ILIM PG
10µF
20mΩ
V
OUT
3.3V
I
OUT(MAX)
1A
3045 F07
16.5k
SET
OUTS
+
–
100µA
IN
EN/UV
PGFB
GND
OUT
LT3045
ILIM PG
10µF
20mΩ
10µF
V
IN
5V ±5%
SET
OUTS
0.47µF
Figure 7. Parallel Devices
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