Datasheet

LT3042
18
3042fb
For more information www.linear.com/LT3042
APPLICATIONS INFORMATION
To that end, LTC recommends using the LT3042 demo
board (DC2246B) layout for achieving the best possible
PSRR performance. The LT3042 demo board layout
utilizes magnetic field cancellation techniques to prevent
PSRR degradation caused by this high-frequency current
flow—while utilizing the input capacitor.
Filtering High Frequency Spikes
For applications where the LT3042 is used to post-regulate
a switching converter, its high PSRR effectively sup
-
presses any “noise” present at the switcher’s switching
frequency —
typically
100kHz to 4MHz. However, the very
high frequency (100s of MHz) “spikes” — beyond the
LT3042’s bandwidth — associated with the switcher’s
power switch transition times will almost directly pass
through the LT3042. While the output capacitor is partly
intended to absorb these spikes, its ESL will limit its ability
at these frequencies. A ferrite bead or even the inductance
associated with a short (e.g. 0.5”) PCB trace between the
switcher’s output and the LT3042’s input can serve as an
LC-filter to suppress these very high frequency spikes.
Output Noise
The LT3042 offers many advantages with respect to noise
performance. Traditional linear regulators have several
sources of noise. The most critical noise sources for a
traditional regulator are its voltage reference, error amplifier,
noise from the resistor divider network used for setting
output voltage and the noise gain created by this resistor
divider. Many low noise regulators pin out their voltage
reference to allow for noise reduction by bypassing the
reference voltage.
Unlike most linear regulators, the LT3042 does not use a
voltage reference; instead, it uses a 100µA current refer-
ence. The current reference operates with typical noise
current level of
20pA
/√Hz (6nA
RMS
over a 10Hz to 100kHz
bandwidth). The resultant voltage noise equals the current
noise multiplied by the resistor value, which in turn is RMS
summed with the error amplifier’s noise and the resistor’s
own noise of √4kTR — whereby k = Boltzmann’s constant
1.38 • 10
–23
J/K and T is the absolute temperature.
One problem that conventional linear regulators face is
that the resistor divider setting the output voltage gains up
the reference noise. In contrast, the LT3042’s unity-gain
follower architecture presents no gain from the SET pin
to the output. Therefore, if a capacitor bypasses the SET
pin resistor, then the output noise is independent of the
programmed output voltage. The resultant output noise
is then set just by the error amplifier’s noise — typically
2nV/√Hz from 10kHz to 1MHz and 0.8µV
RMS
in a 10Hz to
100kHz bandwidth using a 4.7µF SET pin capacitor. Paral-
leling multiple LT3042s further reduces noise by √N, for
N parallel regulators.
Refer to the T
ypical Per
formance Characteristics section
for noise spectral density and RMS integrated noise over
various load currents and SET pin capacitances.
Set Pin (Bypass) Capacitance: Noise, PSRR, Transient
Response and Soft-Start
In addition to reducing output noise, using a SET pin bypass
capacitor also improves PSRR and transient performance.
Note that any bypass capacitor leakage deteriorates the
LT3042’s DC regulation. Capacitor leakage of even 100nA
is a 0.1% DC error. Therefore, LTC recommends the use
of a good quality low leakage ceramic capacitor.
Using a SET pin bypass capacitor also soft-starts the output
and limits inrush current. The RC time constant, formed
by the SET pin resistor and capacitor, controls soft-start
time. Ramp-up rate from 0 to 90% of nominal V
OUT
is:
t
SS
≈ 2.3 • R
SET
• C
SET
(fast start-up disabled)
Fast Start-Up
For ultralow noise applications that require low 1/f noise
(i.e. at frequencies below 100Hz), a larger value SET pin
capacitor is required, up to 22µF. While normally this would
significantly increase the regulator’s start-up time, the
LT3042 incorporates fast start-up circuitry that increases
the SET pin current to about 2mA during start-up.
As shown in the Block Diagram, the 2mA current source
remains engaged while PGFB is below 300mV, unless the
regulator is in current limit, dropout, thermal shutdown
or input voltage is below minimum V
IN
.
If fast start-up capability is not used, tie PGFB to IN or to
OUT for output voltages above 300mV. Note that doing
so also disables power good functionality.
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