Datasheet

LT3042
16
3042fb
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APPLICATIONS INFORMATION
X5R and X7R. The Z5U and Y5V dielectrics are good for
providing high capacitance in the small packages, but they
tend to have stronger voltage and temperature coefficients
as shown in Figure4 and Figure5. When used with a 5V
regulator, a 16V 10µF Y5V capacitor can exhibit an effective
value as low as 1µF to 2µF for the DC bias voltage applied
over the operating temperature range.
X5R and X7R dielectrics result in more stable character
-
istics and are thus more suitable for LT3042. The X7R
dielectric has better stability across temperature, while
the X5R
is less expensive and is available in higher values.
Nonetheless, care must still be exer
cised when using
X5R and X7R capacitors. The X5R and X7R codes only
specify operating temperature range and the maximum
capacitance change over temperature. While capacitance
change due to DC bias for X5R and X7R is better than
Y5V and Z5U dielectrics, it can still be significant enough
to drop capacitance below sufficient levels. As shown in
Figure6, capacitor DC bias characteristics tend to improve
as component case size increases, but verification of
expected capacitance at the operating voltage is highly
recommended.
High Vibration Environments
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress upon
it, similar to how a piezoelectric microphone works. For a
ceramic capacitor, this stress can be induced by mechanical
vibrations within the system or due to thermal transients.
LT3042 applications in high vibration environments have
three distinct piezoelectric noise generators: ceramic
output, input, and SET pin capacitors. However, due to
LT3042’s very low output impedance over a wide fre
-
quency range, negligible output noise is generated using
a ceramic output capacitor
. Similarly
, due to LT3042’s
ultrahigh PSRR, negligible output noise is generated
using a ceramic input capacitor. Nonetheless, given the
high SET pin impedance, any piezoelectric response
from a ceramic SET pin capacitor generates significant
output noise – peak-to-peak excursions of hundreds of
µVs. However, due to the SET pin capacitor’s high ESR
Figure4. Ceramic Capacitor DC Bias Characteristics
Figure5. Ceramic Capacitor Temperature Characteristics
Figure6. Capacitor Voltage Coefficient for Different Case Sizes
DC BIAS VOLTAGE (V)
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
–100
CHANGE IN VALUE (%)
–80
642
8
10 12
3042 F04
14
0
20
–60
–40
X5R
Y5V
–20
16
TEMPERATURE (°C)
–50
–100
CHANGE IN VALUE (%)
–80
250–25
50
75 100
3042 F05
0
20
40
–60
–40
Y5V
–20
125
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
X5R
DC BIAS (V)
1
–100
CHANGE IN VALUE (%)
–80
–60
–40
–20
0
20
5 10 15 20
3042 F06
25
1210, 2.2mm THICK
1206, 1.8mm THICK
0805, 1.4mm THICK
MURATA: X7R, 25V,4.7µF CERAMIC
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