Datasheet
LT3042
12
3042fb
For more information www.linear.com/LT3042
PIN FUNCTIONS
IN (Pins 1, 2): Input. These pins supply power to the
regulator. The LT3042 requires a bypass capacitor at the
IN pin. In general, a battery’s output impedance rises with
frequency, so include a bypass capacitor in battery-powered
applications. While a 4.7µF input bypass capacitor gener
-
ally suffices, applications with large load transients may
require higher input capacitance to prevent input supply
droop. Consult the Applications Information section on the
proper use of an input capacitor and its effect on cir
cuit
performance, in particular PSRR. The LT3042 withstands
reverse voltages on IN with respect to GND, OUTS and OUT.
In the case of a reversed input, which occurs if a battery
is plugged-in backwards, the LT3042 acts as if a diode is
in series with its input. Hence, no reverse current flows
into the LT3042 and no negative voltage appears at the
load. The device protects itself and the load.
EN/UV (Pin 3): Enable/UVLO. Pulling the LT3042’s EN/UV
pin low places the part in shutdown. Quiescent current in
shutdown drops to less than 1µA and the output voltage
turns off. Alternatively, the EN/UV pin can set an input
supply undervoltage lockout (UVLO) threshold using a
resistor divider between IN, EN/UV and GND. The LT3042
typically turns on when the EN/UV voltage exceeds 1.24V
on its rising edge, with a 170mV hysteresis on its falling
edge. The EN/UV pin can be driven above the input voltage
and maintain proper functionality. If unused, tie EN/UV to
IN. Do not float the EN/UV pin.
PG (Pin 4): Power Good. PG is an open-collector flag that
indicates output voltage regulation. PG pulls low if PGFB
is below 300mV. If the power good functionality is not
needed, float the PG pin. A parasitic substrate diode exists
between PG and GND pins of the LT3042; do not drive
PG more than 0.3V below GND during normal operation
or during a fault condition.
ILIM (Pin 5): Current Limit Programming Pin. Connecting
a resistor between ILIM and GND programs the current
limit. For best accuracy, Kelvin connect this resistor directly
to the LT3042’s GND pin. The programming scale factor
is nominally 125mA•kΩ. The ILIM pin sources current
proportional (1:400) to output current; therefore, it also
serves as a current monitoring pin with a 0V to 300mV
range. If the programmable current limit functionality is
not needed, tie ILIM to GND. A parasitic substrate diode
exists between ILIM and GND pins of the LT3042; do not
drive ILIM more than 0.3V below GND during normal
operation or during a fault condition.
PGFB (Pin 6): Power Good Feedback. The PG pin pulls
high if PGFB increases beyond 300mV on its rising edge,
with 7mV hysteresis on its falling edge. Connecting an
external resistor divider between OUT, PGFB and GND
sets the programmable power good threshold with the
following transfer function: 0.3V • (1 + R
PG2
/R
PG1
). As
discussed in the Applications Information section, PGFB
also activates the fast start-up circuitry. Tie PGFB to IN
if power good and fast start-up functionalities are not
needed, and if reverse input protection is additionally
required, tie the anode of a 1N4148 diode to IN and its
cathode to PGFB. See the Typical Applications section for
details. A parasitic substrate diode exists between PGFB
and GND pins of the LT3042; do not drive PGFB more
than 0.3V below GND during normal operation or during
a fault condition.
SET (Pin 7): SET. This pin is the inverting input of the error
amplifier and the regulation set-point for the LT3042. SET
sources a precision 100µA current that flows through an
external resistor connected between SET and GND. The
LT3042’s output voltage is determined by V
SET
= I
SET
•R
SET
.
Output voltage range is from zero to 15V. Adding a capaci-
tor from SET to GND improves noise, PSRR and transient
response at the expense of increased
start-up time.
For
optimum load regulation, Kelvin connect the ground side
of the SET pin resistor directly to the load. A parasitic
substrate diode exists between SET and GND pins of the
LT3042; do not drive SET more than 0.3V below GND
during normal operation or during a fault condition.
GND (Pin 8, Exposed Pad Pin 11): Ground. The exposed
backside is an electrical connection to GND. To ensure
proper electrical and thermal performance, solder the
exposed backside to the PCB ground and tie it directly to
the GND pin.
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